ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 73

• Manufacturer Part Number: ADE5166_08
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

8052 MCU CORE ARCHITECTURE
The ADE5166/ADE5169 have an 8052 MCU core and use the
8051 instruction set. Some of the standard 8052 peripherals,
such as the UART, have been enhanced. This section describes
the standard 8052 core and enhancements that have been made
to it in the ADE5166/ADE5169.
The special function register (SFR) space is mapped into the
upper 128 bytes of internal data memory space and is accessed
by direct addressing only. It provides an interface between the
CPU and all on-chip peripherals. See Figure 76 for a block
diagram showing the programming model of the ADE5166/
ADE5169 via the SFR area
All registers except the program counter (PC), instruction register
(IR), and the four general-purpose register banks reside in the
SFR area. The SFR registers include control, configuration, and
data registers that provide an interface between the CPU and all
on-chip peripherals.
MCU REGISTERS
The registers used by the MCU are summarized in Table 56.
Table 56. 8051 SFRs
SFR
ACC
B
PSW
PCON
DPL
DPH
DPTR
SP
SPH
STCON
CFG
Table 57. Program Status Word SFR (PSW, Address 0xD0)
Bit
7
6
5
[4:3]
2
1
0
Bit Address
0xD7
0xD6
0xD5
0xD4, 0xD3
0xD2
0xD1
0xD0
Address
0xE0
0xF0
0xD0
0x87
0x82
0x83
0x82 and 0x83
0x81
0xB7
0xBF
0xAF
Mnemonic
CY
AC
F0
RS1, RS0
OV
F1
P
Yes
No
No
Bit Addressable
Yes
Yes
No
No
No
No
No
No
Description
Carry flag. Modified by ADD, ADDC, SUBB, MUL, and DIV instructions.
Auxiliary carry flag. Modified by ADD and ADDC instructions.
General-purpose flag available to the user.
Register bank select bits.
RS1
0
0
1
1
Overflow flag. Modified by ADD, ADDC, SUBB, MUL, and DIV instructions.
General-purpose flag available to the user.
Parity bit. The number of bits set in the accumulator added to the value of the parity bit is always an
even number.
RS0
0
1
0
1
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Selected Bank
0
1
2
3
Description
Accumulator.
Auxiliary math.
Program status word (see Table 57).
Program control (see Table 58).
Data pointer low (see Table 59).
Data pointer high (see Table 60).
Data pointer (see Table 61).
Stack pointer (see Table 62).
Stack pointer high (see Table 63).
Stack boundary (see Table 64).
Configuration (see Table 65).
256 BYTES
GENERAL-
REGISTER
PURPOSE
Figure 76. Block Diagram Showing Programming Model via the SFRs
BANKS
RAM
62kB ELECTRICALLY
REPROGRAMMABLE
8051-COMPATIBLE
PROGRAM/DATA
NONVOLATILE
FLASH/EE
PC
2kB XRAM
MEMORY
CORE
IR
FUNCTION
REGISTER
ADE5166/ADE5169
128-BYTE
SPECIAL
AREA
OTHER ON-CHIP
PERIPHERALS:
SERIAL I/O
WDT
TIMERS
MEASUREMENT
TEMPERATURE
MANAGEMENT
LCD DRIVER
BATTERY
ENERGY
POWER
RTC
ADC
ADC