KMPC880ZP66 FREESCALE [Freescale Semiconductor, Inc], KMPC880ZP66 Datasheet - Page 68

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KMPC880ZP66

Manufacturer Part Number
KMPC880ZP66
Description
Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
CPM Electrical Characteristics
Table 29
68
1
1
SCL frequency is given by SCL = BrgClk_frequency / ((BRG register + 3) × pre_scaler × 2).
SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3)
Num
Num
210
211
200
200
202
203
204
205
206
207
208
209
210
211
The ratio SyncClk/(BRGCLK/pre_scaler) must be greater or equal to 4/1.
The ratio SyncClk/(Brg_Clk/pre_scaler) must be greater or equal to 4/1.
provides the I
SDL/SCL fall time
Stop condition setup time
SCL clock frequency (slave)
SCL clock frequency (master)
Bus free time between transmissions
Low period of SCL
High period of SCL
Start condition setup time
Start condition hold time
Data hold time
Data setup time
SDL/SCL rise time
SDL/SCL fall time
Stop condition setup time
2
C (SCL > 100 KHz) timings.
Characteristic
Table 28. I
MPC885/MPC880 Hardware Specifications, Rev. 3
Table 29. I
Characteristic
1
2
C Timing (SCL < 100 KH
2
C Timing (SCL > 100 KH
Expression
fSCL
fSCL
Z
BRGCLK/16512
1/2(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
1/(2.2 × fSCL)
) (continued)
1/(40 × fSCL)
Min
Z
0
0
)
All Frequencies
×
All Frequencies
pre_scaler
Min
4.7
1/(10 × fSCL)
1/(33 × fSCL)
BRGCLK/48
BRGCLK/48
Max
Freescale Semiconductor
Max
300
×
2).
Unit
Unit
Hz
Hz
ns
µs
s
s
s
s
s
s
s
s
s
s

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