PIC18C242 MICROCHIP [Microchip Technology], PIC18C242 Datasheet - Page 168

• Manufacturer Part Number: PIC18C242
• Description: High-Performance Microcontrollers with 10-Bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18CXX2
Register 16-2: ADCON1 Register
bit 7:6
bit 7
bit 6
bit 5:4
bit 3:0
DS39026B-page 168
Unimplemented: Read as ’0’
ADFM: A/D Result format select.
1 = Right justified. 6 Most Significant bits of ADRESH are read as ’0’.
0 = Left justified. 6 Least Significant bits of ADRESL are read as ’0’.
ADCS2: A/D Conversion Clock Select bit (shown in bold)
000 = F
001 = F
010 = F
011 = F
100 = F
101 = F
110 = F
111 = F
Unimplemented: Read as ’0’
PCFG3:PCFG0: A/D Port Configuration Control bits
Legend:
R = Readable bit
- n = Value at POR reset
bit 7
A = Analog input D = Digital I/O
C/R = # of analog input channels / # of A/D voltage references
PCFG
Note:
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
Note:
R/W-0
ADFM
OSC
OSC
OSC
RC
OSC
OSC
OSC
RC
AN7
On any device reset, the port pins that are multiplexed with analog functions (ANx) are
forced to be an analog input.
(clock derived from the internal A/D RC oscillator)
The ADCS1:ADCS0 bits are located in the ADCON0 register
(clock derived from the internal A/D RC oscillator)
D
D
D
D
D
D
D
D
D
D
D
D
/2
/8
/32
/4
/16
/64
A
A
A
ADCS2
R/W-0
AN6
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
AN5
D
D
D
D
D
D
D
D
D
A
A
A
A
A
A
W = Writable bit
’1’ = Bit is set
U-0
—
AN4
D
D
D
D
D
D
A
A
A
A
A
A
A
A
A
AN3
A
V
A
V
A
V
D
V
A
V
V
V
V
D
V
REF
REF
REF
REF
REF
REF
REF
REF
REF
Preliminary
U-0
—
+
+
+
+
+
+
+
+
+
AN2
A
A
A
A
D
D
D
V
A
A
V
V
V
D
V
REF
REF
REF
REF
REF
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
-
-
-
-
-
PCFG3
R/W-0
AN1
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
AN0
PCFG2
A
A
A
A
A
A
D
A
A
A
A
A
A
A
A
R/W-0
V
V
AN3
V
AN3
V
AN3
—
AN3
V
AN3
AN3
AN3
AN3
V
AN3
REF
DD
DD
DD
DD
DD
x = Bit is unknown
+
PCFG1
R/W-0
7/99 Microchip Technology Inc.
V
V
V
V
V
V
V
—
AN2
V
V
AN2
AN2
AN2
V
AN2
REF
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
bit 0
PCFG0
C / R
8 / 0
7 / 1
5 / 0
4 / 1
3 / 0
2 / 1
0 / 0
6 / 2
6 / 0
5 / 1
4 / 2
3 / 2
2 / 2
1 / 0
1 / 2
R/W-0