MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 36

• Manufacturer Part Number: MC68HC705C4ACB
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Memory
2.4 Input/Output (I/O)
2.5 RAM
Technical Data
36
NOTE:
subroutine call to save the CPU state. The stack pointer decrements
during pushes and increments during pulls.
Figure 2-1
shown in
registers. Additional I/O registers have these addresses:
The first 32 addresses of memory space, from $0000 to $001F, are the
I/O section. These are the addresses of the I/O control registers, status
registers, and data registers. See
The 176 addresses from $0050–$00FF are RAM locations. The CPU
uses the top 64 RAM addresses, $00C0–00FF, as the stack. Before
processing an interrupt, the CPU uses five bytes of the stack to save the
contents of the CPU registers. During a subroutine call, the CPU uses
two bytes of the stack to store the return address. The stack pointer
decrements when the CPU stores a byte on the stack and increments
when the CPU retrieves a byte from the stack.
Be careful when using nested subroutines or multiple interrupt levels.
The CPU can overwrite data in the stack RAM during a subroutine or
during the interrupt stacking operation.
•
•
•
$1FDF, option register
$1FF0, mask option register 1 (MOR1)
$1FF1, mask option register 2 (MOR2)
Figure
is a memory map of the MCU. Addresses $0000–$001F,
2-2, contain most of the control, status, and data
Memory
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
Figure 2-2
for more information.
MOTOROLA