MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 94

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MC68HC705C4ACB

Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Capture/Compare Timer
8.4.4 Alternate Timer Registers
Technical Data
94
NOTE:
Register Name and Address: Alternate Timer Register High — $001A
Register Name and Address: Alternate Timer Register Low — $001B
To prevent interrupts from occurring between readings of TRH and TRL,
set the interrupt mask (I bit) in the condition code register before reading
TRH, and clear the mask after reading TRL.
The alternate timer registers shown in
high and low bytes of the 16-bit counter. Reading ATRH before reading
ATRL causes ATRL to be latched until ATRL is read. Reading does not
affect the timer overflow flag (TOF). Writing to the alternate timer
registers has no effect.
Reset:
Reset:
Read:
Read:
Write:
Write:
$0018
Figure 8-9. Alternate Timer Registers (ATRH and ATRL)
Bit 15
Bit 7
Bit 7
15
Capture/Compare Timer
= Unimplemented
TIMER REGISTER HIGH
14
6
6
Figure 8-8. Timer Register Reads
READ TRH
13
5
5
Reset initializes ATRH to $FF
Reset initializes ATRL to $FC
INTERNAL DATA BUS
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
LATCH
12
8
4
4
7
7
Figure 8-9
11
TIMER REGISTER LOW
3
3
LOW BYTE BUFFER
contain the current
10
2
2
1
9
1
MOTOROLA
0
0
$0019
Bit 0
Bit 8
Bit 0

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