MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 92
MC68HC705C4ACB
Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705C4ACB.pdf
(210 pages)
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Capture/Compare Timer
8.4.2 Timer Status Register
Technical Data
92
Address:
This read-only register shown in
events:
ICF — Input Capture Flag
OCF — Output Compare Flag
Reset:
Read:
Write:
•
•
•
The ICF bit is set automatically when an edge of the selected polarity
occurs on the TCAP pin. Clear the ICF bit by reading the timer status
register with ICF set and then reading the low byte ($0015) of the
input capture registers. Reset has no effect on ICF.
The OCF bit is set automatically when the value of the timer registers
matches the contents of the output compare registers. Clear the OCF
bit by reading the timer status register with OCF set and then reading
the low byte ($0017) of the output compare registers. Reset has no
effect on OCF.
1 = Input capture
0 = No input capture
1 = Output compare
0 = No output compare
An active signal on the TCAP pin, transferring the contents of the
timer registers to the input capture registers
A match between the 16-bit counter and the output compare
registers, transferring the OLVL bit to the TCMP pin
A timer rollover from $FFFF to $0000
$0013
Bit 7
ICF
U
Figure 8-6. Timer Status Register (TSR)
Capture/Compare Timer
= Unimplemented
OCF
U
6
TOF
U
5
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
Figure 8-6
4
0
0
U = Unaffected
3
0
0
contains flags for these
2
0
0
1
0
0
MOTOROLA
Bit 0
0
0
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