MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 70

• Manufacturer Part Number: MC68HC705C4ACB
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Low-Power Modes
6.3.3 COP Watchdog in Stop Mode
6.4 Wait Mode
Technical Data
70
The STOP instruction has these effects on the computer operating
properly (COP) watchdog:
If the RESET pin brings the MCU out of stop mode, the COP watchdog
begins counting immediately. The reset function clears the COP counter
again after the 4064-t
If the IRQ pin brings the MCU out of stop mode, the COP watchdog
begins counting immediately. The IRQ function does not clear the COP
counter again after the 4064-t
See
The WAIT instruction places the MCU in an intermediate
power-consumption mode. All CPU activity is suspended, but the
oscillator, capture/compare timer, SCI, and SPI remain active. Any
interrupt or reset brings the MCU out of wait mode. See
The WAIT instruction has these effects on the CPU:
The WAIT instruction does not affect any other registers or I/O lines. The
capture/compare timer, SCI, and SPI can be enabled to allow a periodic
exit from wait mode.
The COP watchdog is active during wait mode. Software must
periodically bring the MCU out of wait mode to clear the COP watchdog.
•
•
•
•
Figure
Turns off the oscillator and the COP watchdog counter
Clears the COP watchdog counter
Clears the I bit in the condition code register, enabling interrupts
Stops the CPU clock, but allows the internal clock to drive the
capture/compare timer, SCI, and SPI
6-2.
Low-Power Modes
CYC
clock stabilization delay.
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
CYC
clock stabilization delay.
Figure
MOTOROLA
6-1.