MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 83

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MC68HC705C4ACB

Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
7.5.3 Port C Logic
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
MOTOROLA
NOTE:
Figure 7-9
When a port C pin is programmed as an output, reading the port bit reads
the value of the data latch and not the voltage on the pin. When a port C
pin is programmed as an input, reading the port bit reads the voltage
level on the pin. The data latch can always be written, regardless of the
state of its DDRC bit.
pins.
To avoid excessive current draw, tie all unused input pins to V
or change I/O pins to outputs by writing to DDRC in user code as early
as possible.
1. Hi-Z = high impedance
2. Writing affects data register but does not affect input.
DDRC Bit
0
1
READ $0006
WRITE $0006
WRITE $0002
READ $0002
shows port C I/O logic.
I/O Pin Mode
Parallel Input/Output (I/O)
Input, Hi-Z
RESET
Output
Table 7-3. Port C Pin Functions
Figure 7-9. Port C I/O Logic
Table 7-1
(1)
DATA DIRECTION
PORT C DATA
REGISTER C
REGISTER
Accesses to DDRC
BIT DDRCx
BIT PCx
DDRC7–DDRC0
DDRC7–DDRC0
Read/Write
summarizes the operation of the port C
PC7–PC0
Parallel Input/Output (I/O)
Accesses to PORTC
Read
Pin
Technical Data
PC7–PC0
PC7–PC0
DD
Write
PCx
or V
Port C
(2)
SS
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