MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 65

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MC68HC705C4ACB

Manufacturer Part Number
MC68HC705C4ACB
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
MOTOROLA
INTERNAL
CLOCK
COPC
(f
OP
)
COP WATCHDOG (MC68HC05C4A TYPE)
2
2
2
Two memory locations control operation of the COP watchdog:
Figure 5-1
2
Figure 5-1. COP Watchdog Diagram
2
COP Enable Bit (NCOPE) in Mask Option Register 2
(MOR2) — Programming the NCOPE bit in MOR2 to a logic 1
enables the COP watchdog. See
COP Clear Bit (COPC) at Address $1FF0 — To clear the COP
watchdog and start a new COP timeout period, write a logic 0 to
bit 0 of address $1FF0. Reading address $1FF0 returns the mask
option register 1 (MOR1) data at that location. See
Option Register
2
2
is a diagram of the COP.
2
2
2
Resets
2
1.
2
2
2
2
2
9.5.3 Mask Option Register
2
NCOPE
9.5.2 Mask
Reset Sources
Technical Data
RESET
Resets
2.
65

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