MC68HC705C4ACB MOTOROLA [Motorola, Inc], MC68HC705C4ACB Datasheet - Page 82

• Manufacturer Part Number: MC68HC705C4ACB
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

Parallel Input/Output (I/O)
7.5.2 Data Direction Register C
Technical Data
82
NOTE:
Address:
The contents of data direction register C (DDRC) shown in
determine whether each port C pin is an input or an output. Writing a
logic 1 to a DDRC bit enables the output buffer for the associated port C
pin; a logic 0 disables the output buffer. A reset clears all DDRC bits,
configuring all port C pins as inputs.
DDRC7–DDRC0 — Port C Data Direction Bits
Avoid glitches on port C pins by writing to the port C data register before
changing DDRC bits from logic 0 to logic 1.
Reset:
Read:
Write:
These read/write bits control port C data direction. Reset clears bits
DDRC7–DDRC0.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
DDRC7
$0006
Bit 7
0
Figure 7-8. Data Direction Register C (DDRC)
Parallel Input/Output (I/O)
DDRC6
6
0
DDRC5
5
0
MC68HC705C4A • MC68HSC705C4A — Rev. 3.0
DDRC4
4
0
DDRC3
3
0
DDRC2
2
0
DDRC1
1
0
Figure 7-8
MOTOROLA
DDRC0
Bit 0
0