NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 19

• Manufacturer Part Number: NAND08GAH0A
• Manufacturer: NUMONYX [Numonyx B.V]

NAND08GAH0A, NAND16GAH0D
4.3
4.3.1
4.3.2
Power-up and power-down
Power-up
The power-up and hot insertion (e.g. inserting the device when the bus is operating) are
handled locally in each device and in the bus master.
V
between V
After power-up the device enters the Idle state until the CMD1 command is received. The
bus master must get the device out of the Idle state. Since the power-up time and
supply voltage ramp up time depend on application parameters such as the bus
length and the power supply unit, the host must ensure that the supply voltage has
reached the operating level specified in
CMD1 is a special synchronization command for the host to poll the device states until the
power-up is completed correctly. The response of CMD1 contains a busy flag which
indicates that a device is not ready. The host has to wait until this flag is cleared. The time
for this flag to be cleared is the Identification delay (see
After power-up the host starts the clock and sends the initializing sequence on the CMD line
(see
either 1 ms, 74 clock cycles or the supply ramp up time, whichever is the longest. The
additional 10 clocks (after the 64 clocks after which the device should be ready for
communication) are provided to avoid power-up synchronization problems.
The device ignores all commands until the commands CMD1, CMD2 are issued and the
RCA of the device is initialized.
The initialization delay is relevant only after power-up, the identification delay is relevant for
both power-up and hot insertion.
After power-up, the maximum initial load the NAND08GAH0A and NAND16GAH0D can
present on the V
capacitance on the V
Power-down
At power-down, V
Figure
down.
CC
must be powered up before or simultaneously with V
Figure
9). Commands from the bus master are accepted till V
CC
6). This sequence is a contiguous stream of logic 1 s. The sequence length is
and V
CC
CCQ
CCQ
line is C4, in parallel with a minimum of R4. During operation, device
CC
must go Low before or simultaneously with V
line must not exceed 10
ramp up (see
Figure
CMD1 before issuing a CMD1 command.
8).
µF.
Figure
CCQ
. No delay must be respected
CCQ
6).
MultiMediaCard interface
and V
CC
going Low (see
CC
start to ramp
the
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