NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 35

• Manufacturer Part Number: NAND08GAH0A
• Manufacturer: NUMONYX [Numonyx B.V]

NAND08GAH0A, NAND16GAH0D
5.3.9
Single Block/Multiple Block Write
Single or Multiple Block Write (CMD24-27) allows one or more blocks of data to be
transferred from the host to the device with a CRC bit appended to the end of each block by
the host. A device supporting Block Write must always be able to accept a block of data
defined by WRITE_BL_LEN. If the CRC fails, the device indicates the failure on the DAT
line; the transferred data will be discarded and all further transmitted blocks (Multiple Block
Write mode) will be ignored.
Multiple Block Write operations are initiated by issuing the WRITE_MULTIPLE_BLOCK
command (CMD25). There are two types of Multiple Block Write operations:
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If either one of the following errors is detected when the CMD24-27 command is received,
the device rejects the command, remains in Transfer state and sets the corresponding error
bit:
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If the device detects an error (e.g. write protect violation, address out of range, address
misalignment, internal error, etc.) during a Multiple Block Write operation, it stops data
transmission and remains in the Receiving data state. The host must then abort the
operation by sending the STOP-TRANSMISSION command. The write error is reported in
the response to the STOP-TRANSMISSION command.
When the host uses partial blocks and block misalignment is not allowed
(WRITE_BLK_MIS-ALIGN parameter not set in CSD Register), the total length of the partial
blocks must be block aligned otherwise the device detects the misalignment, return an error
data response, ignore subsequent incoming data blocks, and return to Transfer state.
The block length does not need to be set prior to programming the CID and CSD registers.
The Data transferred to the CID and CSD registers is also CRC protected. If a part of the
Open-ended Multiple Block Write
The number of blocks is not defined and the host terminates device programming by
sending a STOP-TRANSMISSION command.
Multiple Block Write with pre-defined block counts
The number of blocks to be programmed is pre-determined so the host does not need
to send a STOP-TRANSMISSION command to stop the operation. To issue the
Multiple Block Write operation with a pre-defined block count, the
WRITE_MULTIPLE_BLOCK command must be preceded by the
SET_BLOCK_COUNT (CMD23) command, failing which the initiated Multiple Block
Write operation will be open-ended.
If all the arguments of the CMD23 command are set to 0, the command is accepted.
However, a subsequent write will follow the open-ended WRITE_MULTIPLE_BLOCK
operation protocol (STOP_TRANSMISSION command is required).
If a Multiple Block Write with pre-defined block count is aborted by a STOP-
TRANSMISSION command, the data in the remaining blocks are invalid.
If the host sends a STOP-TRANSMISSION command after the last block of a Multiple
Block Write operation with a pre-defined number of blocks is programmed, it is
regarded as an illegal command, since the device is no longer in Receiving data state.
The address provides by the host as an argument to either CMD24-27 is out of range.
ADDRESS_OUT_OF_RANGE is set.
The currently defined block length is illegal for a write operation. BLOCK_LEN_ERROR
is set.
The address/block-length combination positions the first data block is misaligned to the
device physical blocks. ADDRESS_MISALIGN is set.
High speed MultiMediaCard operation
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