NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 91

• Manufacturer Part Number: NAND08GAH0A
• Manufacturer: NUMONYX [Numonyx B.V]

NAND08GAH0A, NAND16GAH0D
10.4.5
10.4.6
10.4.7
Erase and Write Protect management
The Erase and Write Protect management procedures in the SPI mode are identical to
those of the MultiMediaCard mode. While the device is erasing or changing the write
protection bits of the predefined erase groups list, it is in a busy state and holds the DataOut
line Low.
Figure 34. Erase and Write Protect operations
Read the CID and CSD registers
Unlike the MultiMediaCard protocol (where the register contents is sent as a command
response), reading the contents of the CSD and CID registers in SPI mode is a simple read-
block transaction. The device responds with a standard response token (see
followed by a data block of 16 bytes suffixed with a 16 bit CRC.
The data time out for the CSD command cannot be set to the device TAAC since this value
is stored in the CSD.
Refer to
CSD.
Reset sequence
The MultiMediaCard requires a defined reset sequence. After power-up reset or CMD0
(software reset) the device enters an idle state. In this state the only legal host commands
are CMD1 (SEND_OP_COND) and CMD58 (READ_OCR).
The host must poll the device (by repeatedly sending CMD1) until the ‘in-idle-state’ bit in the
device response indicates (by being cleared to 0) that the device has completed its
initialization processes and is ready for the next command.
In SPI mode, as opposed to MultiMediaCard mode, CMD1 has no operands and does not
return the contents of the OCR register. Instead, the host may use CMD58 (available in SPI
mode only) to read the OCR register.
Furthermore, it is of the responsibility of the host to refrain from gaining access to a device
that does not support its voltage range.
The usage of CMD58 is not restricted to the initializing phase, the command can be issued
at any time. The host must poll the device (by repeatedly sending CMD1) until the ‘in-idle-
state’ bit in the device response indicates (by being cleared to 0) that the device has
completed its initialization processes and is ready for the next command.
Data in
Data out
Table 71
Figure 34
for timing values. For consistency, read CID transaction is identical to read
command
from host
illustrates a ‘no data’ bus transaction with and without busy signalling.
to card
response
from card
to host
command
from host
to card
Serial peripheral interface (SPI) mode
from card
response busy
to host
Figure
31)
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