NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 28

• Manufacturer Part Number: NAND08GAH0A
• Manufacturer: NUMONYX [Numonyx B.V]

High speed MultiMediaCard operation
5.3
5.3.1
5.3.2
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Data Transfer mode
The device enters data transfer mode once an RCA is assigned to it. When the device is in
Standby mode, issuing the CMD7 command along with the RCA selects the device and puts
it into the Transfer state.
The host enters Data Transfer mode after identifying all the MultiMediaCard devices on the
bus. When all devices are in Standby state, communication over the CMD and DAT lines will
be in push-pull mode (see
The device supports two Read/Write modes as shown in
●
●
The host issues CMD9 to obtain the Card Specific Data (CSD register). MultiMediaCard
devices which already have an RCA do not respond to the identification command flow in
this mode. Until the content of all CSD registers is known by the host, the f
remain at f
The relationship between the various operation modes is summarized in
MultiMediaCard state diagram (Data Transfer
Active command set selection
By default, the device uses the MultiMediaCard standard command set after a power-up or
software reset (CMD0). The host can change the active command set by issuing the
SWITCH command (CMD6) with the ‘Command Set’ access mode selected.
The supported command sets, as well as the currently selected command set, are defined
in the EXT_CSD register.
High speed mode selection
The device operates in high-speed mode (HS-MMC) at clock frequencies higher than
20 MHz.
The host must first check whether the Numonyx NAND08GAH0A and NAND16GAH0D
comply with eMMC
The high speed mode of the device must then be enables, before changing the clock
frequency to a frequency higher than 20 MHz. This is done by using the SWITCH command
to write 0x01 to the HS_TIMING byte, in the modes segment of the EXT_CSD register.
Single Block mode
–
Multiple Block mode
–
In this mode the host reads or writes one data block of a pre-specified length. The
data block transmission is protected with a 16 bit Cyclic Redundancy Check
(CRC).
This mode is similar to the single block mode, but the host can read/write multiple
data blocks (all have the same length) which will be stored or retrieved from
contiguous memory addresses.
OD
because some devices may have operating frequency restrictions.
™
/MultiMediaCard system specification version 4.1.
Table 10: Bus modes
mode).
overview).
NAND08GAH0A, NAND16GAH0D
Figure 11: Data transfer
Figure 12:
PP
clock rate must
formats.