HYB25D128160CE-5 QIMONDA [Qimonda AG], HYB25D128160CE-5 Datasheet - Page 21

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HYB25D128160CE-5

Manufacturer Part Number
HYB25D128160CE-5
Description
128-Mbit Double-Data-Rate SDRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) These values are not subject to production test - verified by design/characterization and are tested on a sample base only.
2) DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace matching at the
Rev. 1.6, 2007-02
03292006-U5AN-6TI1
Parameter
Input Capacitance: CK, CK
Delta Input Capacitance
Input Capacitance: All other input-only pins
Delta Input Capacitance: All other input-only
pins
Input/Output Capacitance: DQ, DQS, DM
Delta Input/Output Capacitance: DQ, DQS,
DM
2.5 V ± 0.2 V,
board level.
f
= 100 MHz,
T
A
= 25 °C,
V
OUT(DC)
=
Symbol
C
C
C
C
C
C
V
I1
dI1
I2
dIO
IO
dIO
DDQ
/2,
V
OUT
(Peak to Peak) 0.2 V. Unused pins are tied to ground.
21
Min.
1.5
2.0
1.5
2.0
3.5
4.0
Typ.
Values
Max.
2.5
3.0
0.25
2.5
3.0
0.5
4.5
5.0
0.5
128-Mbit Double-Data-Rate SDRAM
Input and Output Capacitances
Unit
pF
pF
pF
pF
pF
pF
HYB25D128xxxC[C/E/F/T](L)
pF
pF
pF
Internet Data Sheet
Note/
Test Condition
P(G)-TFBGA-60
P(G)-TSOPII-66
P(G)-TFBGA-60
P(G)-TSOPII-66
P(G)-TFBGA-60
P(G)-TSOPII-66
TABLE 17
V
DDQ
=
V
1)
2)
DD
=

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