PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 115
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PIC24FJ128GB
Manufacturer Part Number
PIC24FJ128GB
Description
64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC24FJ128GB.pdf
(328 pages)
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REGISTER 7-2:
© 2008 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7-6
bit 5-0
Note 1:
CPDIV1
R/W-0
R/W-0
ROI
2:
This bit is automatically cleared when the ROI bit is set and an interrupt occurs.
This setting is not allowed while the USB module is enabled.
ROI: Recover on Interrupt bit
1 = Interrupts clear the DOZEN bit and reset the CPU peripheral clock ratio to 1:1
0 = Interrupts have no effect on the DOZEN bit
DOZE2:DOZE0: CPU Peripheral Clock Ratio Select bits
111 = 1:128
110 = 1:64
101 = 1:32
100 = 1:16
011 = 1:8
010 = 1:4
001 = 1:2
000 = 1:1
DOZEN: DOZE Enable bit
1 = DOZE2:DOZE0 bits specify the CPU peripheral clock ratio
0 = CPU peripheral clock ratio set to 1:1
RCDIV2:RCDIV0: FRC Postscaler Select bits
111 = 31.25 kHz (divide by 256)
110 = 125 kHz (divide by 64)
101 = 250 kHz (divide by 32)
100 = 500 kHz (divide by 16)
011 = 1 MHz (divide by 8)
010 = 2 MHz (divide by 4)
001 = 4 MHz (divide by 2)
000 = 8 MHz (divide by 1)
CPDIV1:CPDIV0: USB System Clock Select bits (postscaler select from 32 MHz clock branch)
11 = 4 MHz (divide by 8)
10 = 8 MHz (divide by 4)
01 = 16 MHz (divide by 2)
00 = 32 MHz (divide by 1)
Unimplemented: Read as ‘0’
CPDIV0
DOZE2
R/W-0
R/W-0
CLKDIV: CLOCK DIVIDER REGISTER
W = Writable bit
‘1’ = Bit is set
DOZE1
R/W-0
U-0
—
(2)
(2)
(1)
PIC24FJ256GB110 FAMILY
DOZE0
R/W-0
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DOZEN
R/W-0
U-0
—
(1)
RCDIV2
R/W-0
U-0
—
x = Bit is unknown
RCDIV1
R/W-0
U-0
—
DS39897B-page 113
RCDIV0
R/W-1
U-0
—
bit 8
bit 0
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