PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 268

• Manufacturer Part Number: PIC24FJ128GB
• Description: 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
• Manufacturer: MICROCHIP [Microchip Technology]

PIC24FJ256GB110 FAMILY
24.2
Time measurements on the pulse width can be similarly
performed, using the A/D module’s internal capacitor
(C
Figure 24-2 shows the external connections used for
time measurements, and how the CTMU and A/D mod-
ules are related in this application. This example also
shows both edge events coming from the external
CTEDG pins, but other configurations using internal
edge sources are possible. A detailed discussion on
measuring capacitance and time with the CTMU module
is provided in the PIC24F Family Reference Manual.
24.3
The CTMU module can also generate an output pulse
with edges that are not synchronous with the device’s
system clock. More specifically, it can generate a pulse
with a programmable delay from an edge event input to
the module.
FIGURE 24-2:
FIGURE 24-3:
DS39897B-page 266
AD
) and a precision resistor for current calibration.
Measuring Time
Pulse Generation and Delay
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME
MEASUREMENT TIME
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE
DELAY GENERATION
CTEDG1
C2INB
C
CTEDG1
CTEDG2
DELAY
ANx
R
PR
EDG1
CV
EDG2
Preliminary
EDG1
Current Source
PIC24F Device
Comparator
REF
C
AD
PIC24F Device
A/D Converter
CTMU
C2
Current Source
CTMU
Output Pulse
When the module is configured for pulse generation
delay by setting the TGEN bit (CTMUCON<12>), the
internal current source is connected to the B input of
Comparator 2. A capacitor (C
the Comparator 2 pin, C2INB, and the comparator volt-
age reference, CV
is then configured for a specific trip point. The module
begins to charge C
detected. When C
point, a pulse is output on CTPLS. The length of the
pulse delay is determined by the value of C
the CV
Figure 24-3 shows the external connections for pulse
generation, as well as the relationship of the different
analog modules required. While CTEDG1 is shown as
the input pulse source, other options are available. A
detailed discussion on pulse generation with the CTMU
module is provided in the “PIC24F Family Reference
Manual”.
REF
trip point.
DELAY
REF
CTPLS
DELAY
, is connected to C2INA. CV
© 2008 Microchip Technology Inc.
charges above the CV
when an edge event is
DELAY
) is connected to
DELAY
REF
and
REF
trip