PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 253

• Manufacturer Part Number: PIC24FJ128GB
• Description: 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
• Manufacturer: MICROCHIP [Microchip Technology]

REGISTER 21-1:
© 2008 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-10
bit 9-8
bit 7-5
bit 4-3
bit 2
bit 1
bit 0
Note 1:
ADON
SSRC2
R/W-0
R/W-0
(1)
Values of ADC1BUFx registers will not retain their values once the ADON bit is cleared. Read out the
conversion values from the buffer before disabling the module.
ADON: A/D Operating Mode bit
1 = A/D Converter module is operating
0 = A/D Converter is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
FORM1:FORM0: Data Output Format bits
11 = Signed fractional (sddd dddd dd00 0000)
10 = Fractional (dddd dddd dd00 0000)
01 = Signed integer (ssss sssd dddd dddd)
00 = Integer (0000 00dd dddd dddd)
SSRC2:SSRC0: Conversion Trigger Source Select bits
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = Reserved
101 = Reserved
100 = CTMU event ends sampling and starts conversion
011 = Timer5 compare ends sampling and starts conversion
010 = Timer3 compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing SAMP bit ends sampling and starts conversion
Unimplemented: Read as ‘0’
ASAM: A/D Sample Auto-Start bit
1 = Sampling begins immediately after last conversion completes. SAMP bit is auto-set.
0 = Sampling begins when SAMP bit is set
SAMP: A/D Sample Enable bit
1 = A/D sample/hold amplifier is sampling input
0 = A/D sample/hold amplifier is holding
DONE: A/D Conversion Status bit
1 = A/D conversion is done
0 = A/D conversion is NOT done
SSRC1
R/W-0
U-0
—
AD1CON1: A/D CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
ADSIDL
SSRC0
R/W-0
R/W-0
(1)
PIC24FJ256GB110 FAMILY
U-0
U-0
—
—
Preliminary
HCS = Hardware Clearable/Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-0
ASAM
U-0
—
x = Bit is unknown
R/W-0, HCS
FORM1
SAMP
R/W-0
DS39897B-page 251
R/W-0, HCS
FORM0
R/W-0
DONE
bit 8
bit 0