PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 3

• Manufacturer Part Number: PIC24FJ128GB
• Description: 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
• Manufacturer: MICROCHIP [Microchip Technology]

Power Management:
• On-Chip 2.5V Voltage Regulator
• Switch between Clock Sources in Real Time
• Idle, Sleep and Doze modes with Fast Wake-up and
• Run mode: 1 mA/MIPS, 2.0V Typical
• Sleep mode Current Down to 100 nA Typical
• Standby Current with 32 kHz Oscillator: 2.5 μA,
Universal Serial Bus Features:
• USB v2.0 On-The-Go (OTG) Compliant
• Dual Role Capable – can act as either Host or Peripheral
• Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) USB
• Full-Speed USB Operation in Device mode
• High-Precision PLL for USB
• Internal Voltage Boost Assist for USB Bus Voltage
• Interface for Off-Chip Charge Pump for USB Bus
• Supports up to 32 Endpoints (16 bidirectional):
• On-Chip USB Transceiver with On-Chip Voltage Regulator
• Interface for Off-Chip USB Transceiver
• Supports Control, Interrupt, Isochronous and Bulk Transfers
• On-Chip Pull-up and Pull-Down Resistors
© 2008 Microchip Technology Inc.
PIC24FJ64GB106
PIC24FJ128GB106
PIC24FJ192GB106
PIC24FJ256GB106
PIC24FJ64GB108
PIC24FJ128GB108
PIC24FJ192GB108
PIC24FJ256GB108
PIC24FJ64GB110
PIC24FJ128GB110
PIC24FJ192GB110
PIC24FJ256GB110
Two-Speed Start-up
2.0V typical
Operation in Host mode
Generation
Voltage Generation
- USB Module can use any RAM location on the
device as USB endpoint buffers
Device
64/80/100-Pin, 16-Bit Flash Microcontrollers
100
100
100
100
64
64
64
64
80
80
80
80
128K
192K
256K
128K
192K
256K
128K
192K
256K
64K
64K
64K
with USB On-The-Go (OTG)
16K
16K
16K
16K
16K
16K
16K
16K
16K
16K
16K
16K
PIC24FJ256GB110 FAMILY
29
29
29
29
40
40
40
40
44
44
44
44
Remappable Peripherals
5
5
5
5
5
5
5
5
5
5
5
5
Preliminary
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation at 32 MHz
• 8 MHz Internal Oscillator
• 17-Bit x 17-Bit Single-Cycle Hardware Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture with
• Linear Program Memory Addressing, Up to 12 Mbytes
• Linear Data Memory Addressing, Up to 64 Kbytes
• Two Address Generation Units for Separate Read and
Analog Features:
• 10-Bit, Up to 16-Channel Analog-to-Digital (A/D)
• Three Analog Comparators with Programmable Input/
• Charge Time Measurement Unit (CTMU)
Flexible Addressing modes
Write Addressing of Data Memory
Converter at 500 ksps:
- Conversions available in Sleep mode
Output Configuration
4
4
4
4
4
4
4
4
4
4
4
4
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
16
16
16
16
16
16
16
16
16
16
16
16
3
3
3
3
3
3
3
3
3
3
3
3
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
DS39897B-page 1
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
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Y
Y
Y