PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 165

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PIC24FJ128GB

Manufacturer Part Number
PIC24FJ128GB
Description
64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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13.3.1
The PWM period is specified by writing to PRy, the
Timer Period register. The PWM period can be
calculated using Equation 13-1.
EQUATION 13-1:
EQUATION 13-2:
EXAMPLE 13-1:
© 2008 Microchip Technology Inc.
1. Find the Timer Period register value for a desired PWM frequency of 52.08 kHz, where F
2.
PWM Period = [(PRy) + 1] • T
where:
Note 1:
Note 1:
Note:
device clock rate) and a Timer2 prescaler setting of 1:1.
Find the maximum resolution of the duty cycle that can be used with a 52.08 kHz frequency and a 32 MHz device clock rate:
T
PWM Period = 1/PWM Frequency = 1/52.08 kHz = 19.2 μs
PWM Period = (PR2 + 1) • T
19.2 μs
PR2
PWM Resolution = log
PWM Frequency = 1/[PWM Period]
CY
PWM PERIOD
A PRy value of N will produce a PWM
period of N + 1 time base count cycles. For
example, a value of 7 written into the PRy
register will yield a period consisting of
8 time base cycles.
Based on T
and PLL are disabled.
Based on T
= 2 * T
OSC
Maximum PWM Resolution (bits) =
Note 1: Based on F
= (PR2 + 1) • 62.5 ns • 1
= 306
CALCULATING THE PWM
PERIOD
CALCULATION FOR MAXIMUM PWM RESOLUTION
PWM PERIOD AND DUTY CYCLE CALCULATIONS
CY
= 62.5 ns
CY
= (log
= 8.3 bits
= T
= 2 * T
CY
OSC
• (Timer Prescale Value)
10
(1)
10
OSC
(F
* 2, Doze mode
(16 MHz/52.08 kHz)/log
CY
CY
; Doze mode and PLL are disabled.
/F
• (Timer 2 Prescale Value)
PWM
CY
)/log
= F
PIC24FJ256GB110 FAMILY
OSC
10
Preliminary
2) bits
/2, Doze mode and PLL are disabled.
log
10
10
2) bits
(
F
PWM
13.3.2
The PWM duty cycle is specified by writing to the
OCxRS and OCxR registers. The OCxRS and OCxR
registers can be written to at any time, but the duty
cycle value is not latched until a match between PRy
and TMRy occurs (i.e., the period is complete). This
provides a double buffer for the PWM duty cycle and is
essential for glitchless PWM operation.
Some important boundary parameters of the PWM duty
cycle include:
• If OCxR, OCxRS, and PRy are all loaded with
• ·If OCxRS is greater than PRy, the pin will remain
See Example 13-1 for PWM mode timing details.
Table 13-1 and Table 13-2 show example PWM
frequencies and resolutions for a device operating at
4 MIPS and 10 MIPS, respectively.
0000h, the OCx pin will remain low (0% duty
cycle).
high (100% duty cycle).
• (Timer Prescale Value)
log
10
F
(2)
CY
PWM DUTY CYCLE
(1)
(1)
OSC
)
= 8 MHz with PLL (32 MHz
bits
DS39897B-page 163

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