OX16PCI952-TQAG OXFORD [Oxford Semiconductor], OX16PCI952-TQAG Datasheet - Page 28

• Manufacturer Part Number: OX16PCI952-TQAG
• Description: Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
• Manufacturer: OXFORD [Oxford Semiconductor]

The device can only issue a wakeup request (power
management event) if it is enabled by this function’s
PME_En bit, bit-8 of the PCI Power Management Register
PMCSR.
Like powerdown, wakeup requests for function 1 can be
generated by either of the 2 Multi_purpose MIO pins when
they are associated with function 1. The means to generate
wakeup events from these sources will have been setup
prior to placing this function into the powerdown states D2
or D3.
The state of the MIO pins (when associated with function 1)
that results in wakeup requests is determined by the
DS-0028 Jul 05
OXFORD SEMICONDUCTOR LTD.
External-Free Release
settings in the local configuration register MIC. As soon as
the correct logic is invoked than a power management
event (wakeup) is asserted. The PME# event is immediate.
When function 1 issues a wake up request, from the MIO
pins, the PME_Status bit in this function’s PCI power
management registers (PMCSR[15]) will be set. This is a
sticky bit which will only be cleared by writing a ‘1’ to it.
While PME_En (PMCSR[8]) remains set, the PME_Status
will continue to assert the PME# pin to inform the device
driver that a power management wake up event has
occurred. After a wake up event is signalled, the device
driver is expected to return this function to the D0 power-
state
OX16PCI952
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