OX16PCI952-TQAG OXFORD [Oxford Semiconductor], OX16PCI952-TQAG Datasheet - Page 59

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OX16PCI952-TQAG

Manufacturer Part Number
OX16PCI952-TQAG
Description
Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
Manufacturer
OXFORD [Oxford Semiconductor]
Datasheet

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Word
1
1
1
1
1
9.1.2
Zone 1 allows each UART and the Parallel Port of the
OX16PCI952 to be pre-configured, prior to any PCI
accesses. This is very useful when these functions need to
run with (typically generic) device drivers and these drivers
are not capable of utilising the enhanced features/modes of
these logical units. For example, the 950 mode of the
UARTs offer high performance. Generic UART drivers will
be unable to enable the 950 mode since this requires
setting of registers outside the register definition within the
generic device drivers. By using function access, the
relevant UART registers can be accessed (setup) via the
eeprom to enable/customize these features before control
is handed to these device drivers.
Each 8-bit (function) access is equivalent to accessing
each UART and/or the parallel port through its assigned I/O
BAR (base address register), with the exception that a
function read access does not return any data (it is
discarded internally). The UARTs and the parallel port
behave as though these function accesses via the eeprom
were corresponding read/write pci accesses.
Each entry for Function Access Zone comprises 2 16 bit
words (word pairs), with the exception when ending this
zone that requires a single word (all 0’s) for ‘termination’.
The format is as shown.
DS-0028 Jul 05
OXFORD SEMICONDUCTOR LTD.
Bits
15
14:12
11
10:8
7:0
1
Zone 1: Function Access
st
WORD of FUNCTION ACCESS PAIR
Description
‘1’ - Function Access Word Pair available.
‘0’ – End Function Access Zone* (over to next
available zone or end eeprom download)
BAR number to access
000 for BAR 0
001 for BAR
Others reserved.
‘0’ : Read access required
(data will be discarded)
‘1’ : Write access required
Function Number, requiring access.
000 – Function 0 (UARTs)
001 – Function 1 (Parallel Port)
Others Reserved.
I/O address to access
This is the address that needs to be
written/read and is the offset address from the
specified BAR.
E.g to access SPR register of UART, address
is 00000111 (7dec).
1 (UART1 or parallel port IO BAR)
(UART0 or parallel port I/O BAR)
External-Free Release
Word
Function Access Examples
1) Enable Internal loopback, of UART 0 (Enable bit 4, of
UART 0’s MCR register).
1
Write Access, Address=00000100 (MCR reg).
2
2) (Continue). Enable FIFO of UART 1 (Enable bit 0, of
UART 1’s FCR register)
1
Write access, address=00000010 (FCR reg)
2
3) (Continue). Read IER Register, UART 0. End Function
Access Zone
1
Read access, address=00000001 (IER reg)
2
data is discarded
* When ending Function Access Zone, only a single word is
required (not word pairs) and all fields must be zeros. See
example 3.
2
2
2
st
nd
st
nd
st
nd
Word: Function Number = 000, BAR No = 000 (UART0),
Word: Function Number = 000, BAR No = 001 (UART1),
Word: Function Number = 000, BAR No =000 (UART0),
Word: Data to be written=00010000
Word: Data to be written=00000001
Word: No data to be written (as read access). Read
Bits
15
14:8
7:0
2
1000100000000100
1000000000010000
1001100000000010
1000000000000001
1000000000000001
1000000000000000
0000000000000000
nd
WORD of FUNCTION ACCESS PAIR
Description
‘1’
Reserved – write 0’s
Data to be written to specified address.
Field is unused for function access READS
(set to 0’s for reads)
(Function Access Word Pair)
(End function Access zone*)
OX16PCI952
Page 59

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