AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 103

• Manufacturer Part Number: AT83EC5123
• Description: (AT8xx512x) Smart Card Reader ICs
• Manufacturer: ATMEL Corporation

Figure 67. Data Transmission Format (CPHA = 0)
Figure 68. Data Transmission Format (CPHA = 1)
4202B–SCR–07/03
MOSI (from Master)
MOSI (from Master)
MISO (from Slave)
SCK Cycle Number
MISO (from Slave)
SCK Cycle Number
SCK (CPOL = 1)
SCK (CPOL = 0)
SCK (CPOL = 0)
SCK (CPOL = 1)
SPEN (internal)
SPEN (internal)
Capture Point
Capture point
SS (to Slave)
SS (to Slave)
As shown in Figure 67, the first SCK edge is the MSB capture strobe. Therefore the
Slave must begin driving its data before the first SCK edge, and a falling edge on the SS
pin is used to start the transmission. The SS pin must be toggled high and then low
between each byte transmitted (Figure 69).
Figure 69. CPHA/SS Timing
Figure 68 shows an SPI transmission in which CPHA is “1”. In this case, the Master
begins driving its MOSI pin on the first SCK edge. Therefore, the Slave uses the first
SCK edge as a start transmission signal. The SS pin can remain low between transmis-
sions (Figure 69). This format may be preferable in systems having only one Master and
only one Slave driving the MISO data line.
MSB
MISO/MOSI
MSB
1
(CPHA = 0)
(CPHA = 1)
MSB
MSB
1
Master SS
Slave SS
Slave SS
2
bit6
bit6
2
bit6
bit6
3
bit5
bit5
3
bit5
bit5
bit4
bit4
4
bit4
4
bit4
Byte 1
bit3
bit3
5
bit3
bit3
5
6
bit2
bit2
6
bit2
bit2
Byte 2
7
bit1
bit1
7
bit1
bit1
LSB
LSB
8
LSB
8
LSB
Byte 3
AT8xC5122/23
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