AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 91

• Manufacturer Part Number: AT83EC5123
• Description: (AT8xx512x) Smart Card Reader ICs
• Manufacturer: ATMEL Corporation

Figure 49. Timer 1 Baud Rate Generator Block Diagram
Internal Baud Rate Generator
Figure 50. Internal Baud Rate Generator Block Diagram
Synchronous Mode (Mode 0)
4202B–SCR–07/03
INT1#
CK_
T1
CK_
T1
SI
GATE1
TMOD.7
/ 6
/ 6
BDRCON.1
TMOD.6
C/T1#
When using the Internal Baud Rate Generator, the Baud Rate is derived from the over-
flow of the timer. As shown in Figure 50 the Internal Baud Rate Generator is an 8-bit
auto-reload timer feed by the peripheral clock or by the peripheral clock divided by 6
depending on the SPD bit in BDRCON register (see Figure 76 on page 98). The Internal
Baud Rate Generator is enabled by setting BBR bit in BDRCON register. SMOD1 bit in
PCON register allows doubling of the generated baud rate.
Mode 0 is a half-duplex, synchronous mode, which is commonly used to expand the I/0
capabilities of a device with shift registers. The transmit data (TXD) pin outputs a set of
eight clock pulses while the receive data (RXD) pin transmits or receives a byte of data.
The 8-bit data are transmitted and received least-significant bit (LSB) first. Shifts occur
at a fixed Baud Rate (see Section “Baud Rate Selection (Mode 0)”). Figure 51 shows
the serial port block diagram in Mode 0.
TCON.6
SPD
TR1
0
1
0
1
BDRCON.4
BRR
(8 bits)
(8 bits)
(8 bits)
(8 bits)
TH1
TL1
BRG
BRL
Overflow
Overflow
/ 2
/ 2
SMOD1
SMOD1
PCON.7
PCON.7
0
1
0
1
AT8xC5122/23
To serial Port
To serial Port
CLOCK
CLOCK
IBRG
T1
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