AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 28
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AT83EC5123
Manufacturer Part Number
AT83EC5123
Description
(AT8xx512x) Smart Card Reader ICs
Manufacturer
ATMEL Corporation
Datasheet
1.AT83EC5123.pdf
(187 pages)
- Current page: 28 of 187
- Download datasheet (3Mb)
Clock Controller
28
AT8xC5122/23
The clock controller is based on an on-chip oscillator feeding an on-chip Phase Lock
Loop (PLL). All the internal clocks to the peripherals and CPU core are generated by this
controller.
The AT8xC5122/23 XTAL1 and XTAL2 pins are the input and the output of a single-
stage on-chip inverter (see Figure 12), which can be configured with off-chip compo-
nents as a Pierce oscillator (see Figure 14). Value of capacitors and crystal
characteristics are detailed in the Section “DC Characteristics” of the AT8xC5122/23
datasheet.
The XTAL1 pin can also be used as input for an external 48 MHz clock.
The clock controller outputs several different clocks as shown in Figure 12:
•
•
•
•
•
These clocks are enabled or not depending on the power reduction mode as detailed in
Section “Power Management”, page 142.
These clocks are generated using four presacalers defined in the table below:
Prescaler
PR1
PR2
PR3
PR4
a clock for the CPU core
a clock for the peripherals which is used to generate the timers, watchdog, SPI,
UART, and ports sampling clocks. This divided clock will be used to generate the
alternate card clock.
a clock for the USB
a clock for the SCIB controller
a clock for the DC/DC converter
Register
CKRL
SCICLK
SCSR
DCCKPS
Reload Factor
CKRL0-3
SCICLK0-5
ALTKPS0-1
DCCKPS3:0
Function
CPU & Peripheral clocks
Smart card
Alternate card
DC/DC
4202B–SCR–07/03
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