AT83EC5123 ATMEL Corporation, AT83EC5123 Datasheet - Page 35

• Manufacturer Part Number: AT83EC5123
• Description: (AT8xx512x) Smart Card Reader ICs
• Manufacturer: ATMEL Corporation

4202B–SCR–07/03
Table 34. Clock Configuration Register 0 - CKCON0 (S:8Fh)
Reset Value = X0X0 X000b
Bit Number Bit Mnemonic Description
7
-
7
6
5
4
3
2
1
0
WDX2
6
WDX2
T1X2
T0X2
SIX2
X2
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Watchdog clock
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the PR1 prescaler.
Set to select the PR1 output for this peripheral.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enhanced UART clock (Mode 0 and 2)
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the PR1 prescaler.
Set to select the PR1 output for this peripheral.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Timer 1 clock
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the PR1 prescaler.
Set to select the PR1 output for this peripheral.
Timer 0 clock
This control bit is validated when the CPU clock X2 is set; when X2 is low,
this bit has no effect.
Cleared to bypass the PR1 prescaler.
Set to select the PR1 output for this peripheral.
System clock Control bit
Cleared to select the PR1 output for CPU and all the peripherals .
Set to bypass the PR1 prescaler and to enable the individual peripherals ‘X2’
bits.
5
-
SIX2
4
3
-
T1X2
2
AT8xC5122/23
T0X2
1
X2
0
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