DM9161EP DAVICOM [Davicom Semiconductor, Inc.], DM9161EP Datasheet - Page 37

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DM9161EP

Manufacturer Part Number
DM9161EP
Description
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet

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9.4.6 100BASE-TX Transmit Timing Parameters
9.4.7 100BASE-TX Transmit Timing Diagram
9.4.8 100BASE-TX Receive Timing Parameters
9.4.9 MII 100BASE-TX Receive Timing Diagram
Final
Version: DM9161-DS-F05
September 10, 2008
1 . Typical values are at 25℃and are for design aid only; not guaranteed and not subject to production testing.
T
Symbol
t
Symbol
TXh
RXh,
t
t
t
TXOD
t
t
t
t
TX pd
t
t
t
RX pd
TX r/f
TX h
TXc
TX s
RXc
RX s
RX h
t
t
t
t
t
t
t
, t
1
2
1
2
3
4
5
Note 1. Typical values are at 25℃and are for design aid only; not guaranteed and not subject to production testing.
TXl
t
TXEN, TXER
RXl
TXD [0:3],
100TX+/-
TXCLK
TXCLK Cycle Time
TXCLK High/Low Time
TXD [0:3], TXEN, TXER Setup To TXCLK High
TXD [0:3], TXEN, TXER Hold From TXCLK High
TXCLK to Output Delay
TXEN Sampled To CRS Asserted
TXEN Sampled To CRS De-asserted
TXEN Sampled To TX+/- Out (Tx Latency)
100TX Driver Rise/Fall Time
RXCLK Cycle Time
RXCLK High/Low Time
RXD [0:3], RXDV, RXER Setup To RXCLK High
RXD [0:3], RXDV, RXER Hold From RXCLK High
RX+/- In To RXD [0:3] Out (Rx Latency)
CRS Asserted To RXD [0:3], RXDV, RXER
CRS De-asserted To RXD [0:3], RXDV, RXER
RX+/- In To CRS Asserted
RX+/- Quiet To CRS De-asserted
RX+/- In To COL De-Asserted
CRS
tTXOD
t
TX
S
Parameter
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
Parameter
t
1
t
TX
pd
tTXc
tTXh
39.998
Min.
16
12
---
---
---
0
3
t
Min.
TX
39.996
h
16
10
10
10
14
14
Typ.
-
-
-
40
20
---
---
4
4
8
4
t
TX
Typ.
r/f
40.002
40
20
15
Max.
4
0
-
-
-
-
-
24
25
---
---
---
---
---
5
t
2
Max.
40.004
24
14
18
18
Unit
BT
BT
BT
-
-
-
-
-
ns
ns
ns
ns
ns
ns
Unit
90% To 10%, Into
100ohm Differential
BT
BT
BT
BT
BT
BT
ns
ns
DM9161
Conditions
50ppm
Conditions
37

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