DM9161EP DAVICOM [Davicom Semiconductor, Inc.], DM9161EP Datasheet - Page 9

• Manufacturer Part Number: DM9161EP
• Description: 10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

5.4 Mode, 2 pins
5.5 Bias and Clock, 4 pins
5.6 Power, 13 pins
Final
Version: DM9161-DS-F05
September 10, 2008
23,30,39,41
15,33,44
Pin No.
Pin No.
Pin No.
1,2
46
10
14
47
48
42
43
9
5
6
CABLESTS
/LINKSTS
PWRDWN
Pin Name
Pin Name
Pin Name
BGRESG
BGRES
AGND
AGND
AGND
DVDD
DGND
AVDD
AVDD
XT2
XT1
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
(D)
I/O
I/O Crystal Output; REF_CLK input for RMII mode
I/O
I/O
O,
LI
O
P
P
P
P
P
P
P
P
I
I
Bandgap Ground
Bandgap Voltage Reference Resistor 6.8K ohm
Crystal Input
Analog Receive Power
Analog Transmit Power
Analog Receive Ground
Analog Transmit Ground
Analog Substrate Ground
Digital Power
Digital Ground
Power Down Control
Asserted high to force the DM9161 into power down mode. When in
power down mode, most of the DM9161 circuit block’s power is turned
off, only the MII management interface (MDC, MDIO) logic is available
(the PHY should respond to management transactions and should not
generate spurious signals on the MII)). To leave power down mode, the
DM9161 needs the hardware or software reset with the PWRDWN pin
low
Cable Status or Link Status
This pin is used to indicate the status of the cable connection when
power up reset latch low (Default)
0 = Without cable connection
1 = With cable connection
This pin is used to indicate the status of the Link connection when power
up reset latch high
0 = Without link
1 = With link
Description
Description
Description
DM9161
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