DM9161EP DAVICOM [Davicom Semiconductor, Inc.], DM9161EP Datasheet - Page 42

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DM9161EP

Manufacturer Part Number
DM9161EP
Description
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet

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10. Application Notes
10.1 Network Interface Signal Routing
Place the transformer as close as possible to the RJ-45
connector. Place all the 50Ω resistors as close as possible
to the DM9161 RX± and TX± pins. Traces routed from RX±
and TX± to the transformer should run in close pairs directly
to the transformer. The designer should be careful not to
cross the transmit and receive pairs. As always, vias should
be avoided as much as possible. The network interface
should be void of any signals other than the TX± and RX±
pairs between the RJ-45 to the transformer and the
transformer to the DM9161. There should be no power or
10.2 10Base-T/100Base-TX Application
42
DM9161
BGRESG
BGRES
RX+
RX-
TX+
TX-
47
48
3
8
7
4
50Ω
1%
10/100 Mbps Fast Ethernet Physical Layer TX/FX Single Chip Transceiver
50Ω
1%
50Ω
1%
50Ω
1%
AVDD
6.8KΩ , 1%
AGND
0.1µ F
AGND
3.3V AVCC
0.1µ F
AGND
0.1µ F
0.1µ F
AGND
Figure 10-1
Transformer
ground planes in the area under the network side of the
transformer to include the area under the RJ-45 connector
(Refer to Figure 10-1 and 10-2). Keep chassis ground away
from all active signals. The RJ-45 connector and any unused
pins should be tied to chassis ground through a resistor
divider network and a 2KV bypass capacitor.
The Band Gap resistor should be placed as physically close
to pin 47 and 48 as possible (refer to Figure 10-1 and 10-2 ).
The designer should not run any high-speed signal near the
Band Gap resistor placement.
1:1
1:1
75Ω
1%
75Ω
1%
75Ω
1%
Chasis GND
0.1µ F/2KV or 0.01µ F/2KV
75Ω
1%
Version: DM9161-DS-F05
3
6
4
5
7
1
2
8
DM9161
September 10, 2008
RJ45
Final

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