MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 179

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MT29C4G48MAZAPAKD-5 E IT

Manufacturer Part Number
MT29C4G48MAZAPAKD-5 E IT
Description
Manufacturer
Micron
Datasheet
Figure 117: Status Register Definition
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
S12
0
1
S10 S9
0
0
0
0
1
1
1
1
S15 S14
0
0
0
0
1
1
1
1
Device Type
LPDDR2
LPDDR
Reserved
0
0
1
1
0
0
1
1
DQ31...DQ16
31..16
S31..S16
0
0
1
1
0
0
1
1
S8
0
1
0
1
0
1
0
1
S13
0
1
0
1
0
1
0
1
1
Refresh Multiplier
Reserved
Reserved
2X
1X
Reserved
0.25X
Reserved
Notes:
Reserved
15
Density
512Mb
DQ15
128Mb
256Mb
1Gb
2Gb
Reserved
S15
Reserved
Reserved
Density
14
DQ14
S14
S11
0
1
1. Reserved bits should be set to 0 for future compatibility.
2. Refresh multiplier is based on the memory device on-board temperature sensor. Re-
DQ13
13
S13
quired average periodic refresh interval =
Device Width
32 bits
16 bits
Type
12
DQ12
S12
2
Width
DQ11
11
S11
S7
Refresh Rate
...
0
X
DQ10
10
S10
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
S6
...
0
X
DQ9
9
S9
S5
...
0
X
DQ8
8
S8
S4
...
0
X
179
DQ7
7
S7
Revision ID
Revision ID
The manufacturer’s revision number starts at ‘0000’
and increments by ‘0001’ each time a change in the
specification (AC timings or feature set), IBIS (pull-
up or pull-down characteristics), or process occurs.
DQ6
6
S6
DQ5
5
S5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
S3
DQ4
4
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
S4
t
Manufacturer ID
REFI × multiplier.
S2
DQ3
3
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
S3
S1
DQ2
2
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
S2
S0
DQ1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
S1
Reserved
Infineon
Elpida
Reserved
Reserved
Reserved
Reserved
Winbond
ESMT
NVM
Reserved
Reserved
Reserved
Reserved
Micron
DQ0
Manufacturer ID
Samsung
0
S0
Status Read Register
© 2009 Micron Technology, Inc. All rights reserved.
I/O bus (CLK L->H edge)
Status register

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