S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 1043
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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All bits in the FCLKDIV register are readable, bit 7 is not writable, bit 6 is write-once-hi and controls the
writability of the FDIV field in normal mode. In special mode, bits 6-0 are writable any number of times
but bit 7 remains unwritable.
Freescale Semiconductor
FDIVLCK
FDIV[5:0]
FDIVLD
Offset Module Base + 0x0000
Reset
Field
5–0
7
6
W
R
FDIVLD
Clock Divider Loaded
0 FCLKDIV register has not been written since the last reset
1 FCLKDIV register has been written since the last reset
Clock Divider Locked
0 FDIV field is open for writing
1 FDIV value is locked and cannot be changed. Once the lock bit is set high, only reset can clear this bit and
Clock Divider Bits — FDIV[5:0] must be set to effectively divide BUSCLK down to 1 MHz to control timed events
during Flash program and erase algorithms.
BUSCLK frequency. Please refer to
0
7
restore writability to the FDIV field in normal mode.
The FCLKDIV register should never be written while a Flash command is
executing (CCIF=0).
FDIVLCK
= Unimplemented or Reserved
0
6
Figure 29-5. Flash Clock Divider Register (FCLKDIV)
MC9S12G Family Reference Manual, Rev.1.23
Table 29-7. FCLKDIV Field Descriptions
0
5
Section 29.4.4, “Flash Command Operations,”
CAUTION
Table 29-8
0
4
Description
shows recommended values for FDIV[5:0] based on the
0
3
FDIV[5:0]
128 KByte Flash Module (S12FTMRG128K1V1)
0
2
for more information.
0
1
0
0
1045
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