S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 248
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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Port Integration Module (S12GPIMV1)
2.5.2.3
This register defines whether the pin is used as an general-purpose input or an output.
If a peripheral module controls the pin the contents of the data direction register is ignored
Independent of the pin usage with a peripheral module this register determines the source of data when
reading the associated data register address (2.5.2.1/2-249).
2.5.2.4
This register turns on a pullup or pulldown device on the related pins determined by the associated polarity
select register (2.5.2.5/2-250).
The pull device becomes active only if the pin is used as an input or as a wired-or output. Some peripheral
module only allow certain configurations of pull devices to become active. Refer to
Routing - Functional
2.5.2.5
This register selects either a pullup or pulldown device if enabled.
It becomes only active if the pin is used as an input. A pullup device can be activated if the pin is used as
a wired-or output.
250
Data Direction Register (DDRx)
Pull Device Enable Register (PERx)
Pin Polarity Select Register (PPSx)
Due to internal synchronization circuits, it can take up to 2 bus clock cycles
until the correct value is read on port data or port input registers, when
changing the data direction register.
description”.
Module
Figure 2-64. Illustration of I/O pin functionality
DDR
PTI
PT
MC9S12G Family Reference Manual,
data out
output enable
module enable
0
1
1
1
NOTE
0
0
Rev.1.23
PIN
Section 2.3, “PIM
Freescale Semiconductor
(Figure
2-64).
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