S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 1169
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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31.4.5
Only the operations marked ‘OK’ in
Flash and EEPROM blocks. Some operations cannot be executed simultaneously because certain hardware
resources are shared by the two memories. The priority has been placed on permitting Program Flash reads
while program and erase operations execute on the EEPROM, providing read (P-Flash) while write
(EEPROM) functionality.
Freescale Semiconductor
FCMD
0x0D
0x0B
0x0E
0x08
0x09
0x10
0x11
0x12
Allowed Simultaneous P-Flash and EEPROM Operations
Erase Flash Block
EEPROM Section
Erase All Blocks
Set User Margin
Set Field Margin
Erase EEPROM
Unsecure Flash
Erase Verify
Command
EEPROM
Program
Sector
Level
Level
Table 31-30. Allowed P-Flash and EEPROM Simultaneous Operations
1
2
Program Flash
Margin Read
Sector Erase
Mass Erase
A ‘Margin Read’ is any read after executing the margin setting commands
‘Set User Margin Level’ or ‘Set Field Margin Level’ with anything but the
‘normal’ level specified. See the Note on margin settings in
and
The ‘Mass Erase’ operations are commands ‘Erase All Blocks’ and ‘Erase
Flash Block’
Program
Read
Section
Erase all EEPROM (and P-Flash) blocks.
An erase of all Flash blocks is only possible when the FPLDIS, FPHDIS, and FPOPEN
bits in the FPROT register and the DPOPEN bit in the EEPROT register are set prior to
launching the command.
Erase a EEPROM (or P-Flash) block.
An erase of the full EEPROM block is only possible when DPOPEN bit in the EEPROT
register is set prior to launching the command.
Supports a method of releasing MCU security by erasing all EEPROM (and P-Flash)
blocks and verifying that all EEPROM (and P-Flash) blocks are erased.
Specifies a user margin read level for the EEPROM block.
Specifies a field margin read level for the EEPROM block (special modes only).
Verify that a given number of words starting at the address provided are erased.
Program up to four words in the EEPROM block.
Erase all bytes in a sector of the EEPROM block.
2
MC9S12G Family Reference Manual, Rev.1.23
31.4.6.13.
1
Table 31-29. EEPROM Commands
Table 31-30
Read
Margin
Read
OK
are permitted to be run simultaneously on the Program
1
Function on EEPROM Memory
EEPROM
Program
OK
Sector
Erase
240 KByte Flash Module (S12FTMRG240K2V1)
OK
Section 31.4.6.12
Erase
Mass
OK
2
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