S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 405
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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10.4.2
An example of startup of clock system from Reset is given in
10.4.3
An example of what happens going into Stop Mode and exiting Stop Mode after an interrupt is shown in
Figure
Freescale Semiconductor
LOCK
System
Reset
LOCK
SYNDIV
POSTDIV $03 (default target f
CPU
PLLCLK
PLLCLK
CPU
10-31. Disable PLL Lock interrupt (LOCKIE=0) before going into Stop Mode.
execution
f
VCORST
Startup from Reset
Stop Mode using PLLCLK as Bus Clock
$18 (default target f
reset state
768 cycles
) (
STOP instruction
Figure 10-31. Stop Mode using PLLCLK as Bus Clock
wakeup
Figure 10-30. Startup of clock system after Reset
VCO
PLL
MC9S12G Family Reference Manual, Rev.1.23
=f
vector fetch, program execution
=50MHz)
VCO
/4 = 12.5MHz)
t
STP_REC
f
PLL
increasing
t
lock
interrupt
S12 Clock, Reset and Power Management Unit (S12CPMU)
t
lock
Figure
continue execution
f
10-30.
PLL
=16MHz
example change
of POSTDIV
$01
f
PLL
=32 MHz
407
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