S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 160

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S9S12G64F0CLFR

Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G64F0CLFR

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
Port
C
D
A
B
-
Port Integration Module (S12GPIMV1)
2.3
162
PC4-PC2
PC1-PC0
PD7-PD0
PB7-PB6
PA7-PA0
BKGD
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
Pin
PIM Routing - Functional description
API_EXTCLK ❏ ❏ ❏
AN15-AN13
AN11-AN10
[PB7:PB6]
[PC4:PC2]
[PC1:PC0]
[PD7:PD0]
[PA7:PA0]
ECLKX2
AMPM1
DACU1
AMPP1
MODC
Signal
BKGD
ECLK
[PC7]
[PC6]
[PC5]
XIRQ
[PB5]
[PB4]
[PB3]
[PB2]
[PB1]
[PB0]
IRQ
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ I/O BDM communication
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
■ ■ ■
❍ ❍
■ ■ ■
❍ ❍
■ ■ ■
■ ■ ■
100
MC9S12G Family Reference Manual,
Table 2-4. Signals and Priorities
(signal priority on pin from top to bottom)
Signals per Device and Package
64
48
Rev.1.23
32
20
I/O
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
I/O GPIO
❍ Routing option on pin
O
O
O
O
Freescale Semiconductor
I
I
I
I
I
I
I
Signal available on pin
Routing reset location
Not available on pin
MODC input during
RESET
Non-maskable
level-sensitive interrupt
Maskable level- or
falling-edge sensitive
interrupt
Free-running clock
(ECLK x 2)
API Clock
Free-running clock
DAC1 output unbuffered
DAC1 non-inv. input (+)
DAC1 inverting input (-)
ADC analog
ADC analog
Legend
Description

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