S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 166
S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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Port
AD
Port Integration Module (S12GPIMV1)
168
PAD15
PAD14
PAD13
PAD12
PAD11
PAD10
PAD9
PAD8
Pin
[PT0AD7]/
[PT0AD6]/
[PT0AD5]/
[PT0AD4]/
[PT0AD3]/
[PT0AD2]/
[PT0AD1]/
[PT0AD0]/
KWAD15
KWAD14
KWAD13
KWAD12
KWAD11
KWAD10
ACMPM
AMPM0
ACMPO
ACMPP
KWAD9
KWAD8
DACU0
AMPP0
DACU0
DACU1
Signal
AMP0
AMP1
AN15
AN14
AN13
AN12
AN11
AN10
AN9
AN8
■
❏ ❏
■ ■ ■ ■ ■ ■ ■ ■
■
❏ ❏
■ ■ ■ ■ ■ ■ ■ ■
■
❏ ❏
■ ■ ■ ■ ■ ■ ■ ■
■ ■
■ ■ ■ ■ ■ ■ ■ ■
■
❏ ❏ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■
❏ ❏ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■
100
MC9S12G Family Reference Manual,
■
■ ■
■
■ ■
■
■ ■
■ ■
■
■
■
Table 2-4. Signals and Priorities
(signal priority on pin from top to bottom)
Signals per Device and Package
64
■ ■
■ ■
■ ■
■
■
■
■
48
■ ■ ■ ■
■ ■ ■ ■
■ ■ ■ ■
Rev.1.23
32
20
I/O
I/O GPIO with interrupt
I/O GPIO with interrupt
I/O GPIO with interrupt
I/O GPIO with interrupt
I/O GPIO with interrupt
I/O GPIO with interrupt
I/O GPIO with interrupt
I/O GPIO with interrupt
❍ Routing option on pin
■
❏
O
O
O
O
O
O
Freescale Semiconductor
I
I
I
I
I
I
I
I
I
I
I
I
Signal available on pin
Routing reset location
Not available on pin
DAC0 output unbuffered
ADC analog
DAC0 non-inv. input (+)
ADC analog
DAC0 inverting input (-)
ADC analog
ADC analog
DAC0 output buffered
DAC0 output unbuffered
ACMP inverting input (-)
ADC analog
DAC1 output buffered
DAC1 output unbuffered
ACMP non-inv. input (+)
ADC analog
ACMP unsync. dig. out
ADC analog
ADC analog
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