S9S12G64F0CLFR Freescale Semiconductor, S9S12G64F0CLFR Datasheet - Page 877
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S9S12G64F0CLFR
Manufacturer Part Number
S9S12G64F0CLFR
Description
16-bit Microcontrollers - MCU S12 Core,64K FLASH AU
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
1 MHz
Program Memory Size
64 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
A/d Bit Size
10 bit, 12 bit
A/d Channels Available
12
Interface Type
SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
40
Number Of Timers
8
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
3.13 V
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Chapter 26
48 KByte Flash Module (S12FTMRG48K1V1)
26.1
The FTMRG48K1 module implements the following:
The Flash memory is ideal for single-supply applications allowing for field reprogramming without
requiring external high voltage sources for program or erase operations. The Flash module includes a
memory controller that executes commands to modify Flash memory contents. The user interface to the
memory controller consists of the indexed Flash Common Command Object (FCCOB) register which is
written to with the command, global address, data, and any required command parameters. The memory
controller must complete the execution of a command before the FCCOB register can be written to with a
new command.
Freescale Semiconductor
Revision
Number
Rev.1.23
V01.04
V01.05
•
•
48Kbytes of P-Flash (Program Flash) memory
1,536bytes of EEPROM memory
Introduction
20 aug 2010
17 Jun 2010
31 Jan 2011
Revision
A Flash word or phrase must be in the erased state before being
programmed. Cumulative programming of bits within a Flash word or
phrase is not allowed.
Date
26.4.6.1/26-913
26.4.6.2/26-914
26.4.6.3/26-914
26.4.6.14/26-92
26.4.6.2/26-914
26.4.6.12/26-92
26.4.6.13/26-92
26.3.2.9/26-896
Sections
Affected
MC9S12G Family Reference Manual, Rev.1.23
4
1
3
Table 26-1. Revision History
Clarify Erase Verify Commands Descriptions related to the bits MGSTAT[1:0]
of the register FSTAT.
Updated description of the commands RD1BLK, MLOADU and MLOADF
Updated description of protection on
CAUTION
Description of Changes
Section 26.3.2.9
879
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