S912XEQ512J3CAGR Freescale Semiconductor, S912XEQ512J3CAGR Datasheet - Page 147

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S912XEQ512J3CAGR

Manufacturer Part Number
S912XEQ512J3CAGR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEQ512J3CAGR

Rohs
yes
Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 kB
Data Ram Size
32 kB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
Interface Type
CAN/SCI/SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEQ512J3CAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. Read: Anytime.
1. Read: Anytime.
2.3.57
2.3.58
Freescale Semiconductor
Address 0x0264
Address 0x0265
Write: Anytime.
Write: Anytime.
PERH
PPSH
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port H pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset no pull device is enabled.
1 Pull device enabled.
0 Pull device disabled.
Port H pull device select—Determine pull device polarity on input pins
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-
up or pull-down device if enabled.
1 A rising edge on the associated Port H pin sets the associated flag bit in the PIFH register. A pull-down device is
0 A falling edge on the associated Port H pin sets the associated flag bit in the PIFH register.A pull-up device is
PERH7
PPSH7
Port H Pull Device Enable Register (PERH)
Port H Polarity Select Register (PPSH)
connected to the associated Port H pin, if enabled by the associated bit in register PERH and if the port is used
as input.
connected to the associated Port H pin, if enabled by the associated bit in register PERH and if the port is used
as input.
0
0
7
7
PERH6
PPSH6
Figure 2-55. Port H Pull Device Enable Register (PERH)
0
0
6
6
Figure 2-56. Port H Polarity Select Register (PPSH)
Table 2-53. PERH Register Field Descriptions
Table 2-54. PPSH Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
PERH5
PPSH5
0
0
5
5
PERH4
PPSH4
0
0
4
4
Description
Description
PERH3
PPSH3
3
0
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
PERH2
PPSH2
0
0
2
2
Access: User read/write
Access: User read/write
PERH1
PPSH1
0
0
1
1
PERH0
PPSH0
0
0
0
0
147
(1)
(1)

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