S912XEQ512J3CAGR Freescale Semiconductor, S912XEQ512J3CAGR Datasheet - Page 602

• Manufacturer Part Number: S912XEQ512J3CAGR
• Description: 16-bit Microcontrollers - MCU 16 BIT,512K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S912XEQ512J3CAGR

• Rohs: yes
• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 kB
• Data Ram Size: 32 kB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• Interface Type: CAN/SCI/SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 15 Inter-Integrated Circuit (IICV3) Block Description
attempt to engage the bus is failed. When considering these cases, the slave service routine should test the
IBAL first and the software should clear the IBAL bit if it is set.
602
Dummy Read
From IBDR
Switch To
Rx Mode
Y
Byte To IBDR
(Master Rx)
Transmitted
Addr Cycle
Write Next
Last Byte
RXAK=0
End Of
?
?
?
Y
N
N
TX
Stop Signal
Generate
Y
N
Figure 15-15. Flow-Chart of Typical IIC Interrupt Routine
Tx/Rx
Set TXAK =1
?
Y
MC9S12XE-Family Reference Manual Rev. 1.25
Byte To Be Read
Byte To Be Read
From IBDR
Read Data
And Store
2nd Last
RX
Last
?
?
N
N
Stop Signal
Generate
Y
Y
RTI
Master
Mode
Clear
IBIF
?
Write Data
(Read)
To IBDR
Set TX
Mode
N
Y
N
7-bit address transfer
Clear IBAL
IAAS=1
Dummy Read
SRW=1
From IBDR
?
Set RX
?
Mode
N
N
(Write)
Y
10-bit
address?
Tx Next
Byte
Y
Y
Y
Dummy Read
From IBDR
Arbitration
ACK From
Switch To
Receiver
IAAS=1
Rx Mode
TX/RX
Lost
?
?
?
?
N
N
N
TX
Data Transfer
From IBDR
Freescale Semiconductor
Read Data
And Store
Dummy Read
From IBDR
RX
N
set RX
Mode
10-bit address transfer
IBDR==
11110xx1?
set TX
Mode
Write Data
To IBDR
Y
Y