S912XEQ512J3CAGR Freescale Semiconductor, S912XEQ512J3CAGR Datasheet - Page 787

• Manufacturer Part Number: S912XEQ512J3CAGR
• Description: 16-bit Microcontrollers - MCU 16 BIT,512K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S912XEQ512J3CAGR

• Rohs: yes
• Core: HCS12X
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 kB
• Data Ram Size: 32 kB
• On-chip Adc: Yes
• Package / Case: LQFP
• Mounting Style: SMD/SMT
• Interface Type: CAN/SCI/SPI
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 119
• Number Of Timers: 25
• Program Memory Type: Flash
• Supply Voltage - Max: 1.98 V, 2.9 V, 5.5 V
• Supply Voltage - Min: 1.72 V, 2.7 V, 3.13 V

Chapter 22
Timer Module (TIM16B8CV2) Block Description
22.1
The basic timer consists of a 16-bit, software-programmable counter driven by a enhanced programmable
prescaler.
This timer can be used for many purposes, including input waveform measurements while simultaneously
generating an output waveform. Pulse widths can vary from microseconds to many seconds.
This timer contains 8 complete input capture/output compare channels and one pulse accumulator. The
input capture function is used to detect a selected transition edge and record the time. The output compare
function is used for generating output signals or for timer software delays. The 16-bit pulse accumulator
is used to operate as a simple event counter or a gated time accumulator. The pulse accumulator shares
timer channel 7 when in event mode.
Freescale Semiconductor
Revision
Number
V02.05
V02.06
V02.07
Introduction
Revision Date
04 May 2010
26 Aug 2009
9 Jul 2009
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Affected
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MC9S12XE-Family Reference Manual Rev. 1.25
Table 22-1. Revision History
- Revised flag clearing procedure, whereby TEN or PAEN bit must be set
when clearing flags.
- Add fomula to describe prescaler
- Correct typo: TSCR ->TSCR1
- Correct reference: Figure 1-25 -> Figure 1-31
- Add description, “a counter overflow when TTOV[7] is set”, to be the
condition of channel 7 override event.
- Phrase the description of OC7M to make it more explicit
- Add
- in TCRE bit description part,add Note
- Add
Table 22-10
Figure 22-31
Description of Changes
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