MCIMX6Q4AVT10ACR Freescale Semiconductor, MCIMX6Q4AVT10ACR Datasheet - Page 149
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MCIMX6Q4AVT10ACR
Manufacturer Part Number
MCIMX6Q4AVT10ACR
Description
Processors - Application Specialized i.MX6Q
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet
1.MCIMX6Q6AVT10AC.pdf
(166 pages)
Specifications of MCIMX6Q4AVT10ACR
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
256 KB
Operating Supply Voltage
1.05 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FCBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
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DISP0_DAT11
DISP0_DAT12
DISP0_DAT13
DISP0_DAT14
DISP0_DAT15
DISP0_DAT16
DISP0_DAT17
DISP0_DAT18
DISP0_DAT19
DISP0_DAT20
DISP0_DAT21
DISP0_DAT22
DISP0_DAT23
DISP0_DAT2
DISP0_DAT3
DISP0_DAT4
DISP0_DAT5
DISP0_DAT6
DISP0_DAT7
DISP0_DAT8
DISP0_DAT9
DRAM_A10
DRAM_A11
DRAM_A12
DRAM_A13
DRAM_A14
DRAM_A15
Ball Name
DRAM_A0
DRAM_A1
DRAM_A2
DRAM_A3
DRAM_A4
DRAM_A5
DRAM_A6
DRAM_A7
DRAM_A8
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
AC14
AB14
AA15
AC12
AD12
AC17
AA12
AA14
AE13
AC13
AB13
Table 101. 21 x 21 mm Functional Contact Assignments (continued)
W24
W14
Ball
R20
U25
U24
V25
U23
P23
U22
V24
P21
P20
R25
R23
R24
R22
Y14
Y13
T23
T24
T22
T21
T20
T25
Y12
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
Power Group
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
NVCC_LCD
Ball Type
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
Default
(Reset
Mode)
Mode
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT5
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
IPU1_DISP0_DATA11
IPU1_DISP0_DATA12
IPU1_DISP0_DATA13
IPU1_DISP0_DATA14
IPU1_DISP0_DATA15
IPU1_DISP0_DATA16
IPU1_DISP0_DATA17
IPU1_DISP0_DATA18
IPU1_DISP0_DATA19
IPU1_DISP0_DATA02
IPU1_DISP0_DATA20
IPU1_DISP0_DATA21
IPU1_DISP0_DATA22
IPU1_DISP0_DATA23
IPU1_DISP0_DATA03
IPU1_DISP0_DATA04
IPU1_DISP0_DATA05
IPU1_DISP0_DATA06
IPU1_DISP0_DATA07
IPU1_DISP0_DATA08
IPU1_DISP0_DATA09
Default Function
Package Information and Contact Assignments
DRAM_ADDR00
DRAM_ADDR01
DRAM_ADDR10
DRAM_ADDR11
DRAM_ADDR12
DRAM_ADDR13
DRAM_ADDR14
DRAM_ADDR15
DRAM_ADDR02
DRAM_ADDR03
DRAM_ADDR04
DRAM_ADDR05
DRAM_ADDR06
DRAM_ADDR07
DRAM_ADDR08
(Signal Name)
Out of Reset Condition
Input/Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
1
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
PU (100K)
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
149
2
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