MCIMX6Q4AVT10ACR Freescale Semiconductor, MCIMX6Q4AVT10ACR Datasheet - Page 67

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MCIMX6Q4AVT10ACR

Manufacturer Part Number
MCIMX6Q4AVT10ACR
Description
Processors - Application Specialized i.MX6Q
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6Q4AVT10ACR

Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
256 KB
Operating Supply Voltage
1.05 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FCBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
Freescale Semiconductor
NF10
NF11
NF12
NF13
NF14
NF15
NF1
NF2
NF3
NF4
NF5
NF6
NF7
NF8
NF9
ID
NAND_CLE setup time
NAND_CLE hold time
NAND_CEx_B setup time
NAND_CEx_B hold time
NAND_WE_B pulse width
NAND_ALE setup time
NAND_ALE hold time
Data setup time
Data hold time
Write cycle time
NAND_WE_B hold time
Ready to NAND_RE_B low
NAND_RE_B pulse width
READ cycle time
NAND_RE_B high hold time
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
Parameter
Figure 33. Read Data Latch Cycle Timing Diagram (Non-EDO Mode)
Figure 34. Read Data Latch Cycle Timing Diagram (EDO Mode)
Table 49. Asynchronous Mode Timing Parameters
Symbol
tCLH
tREH
tCLS
tALS
tALH
tRR
tWP
tWC
tWH
tCS
tCH
tDS
tDH
tRP
tRC
4
(AS + 2)  T [see
Min
(AS + DS)  T - 0.12 [see
(AS + DS)  T - 0.49 [see
(AS + DS + 1)  T [see
T = GPMI Clock Cycle
(DH+1)  T - 1 [see
(DH  T - 0.42 [see
(DS + DH)  T [see
(DS + DH)  T [see
DH  T - 0.72 [see
DS  T - 0.26 [see
DH  T - 1.37 [see
3,2
DH  T [see
DH  T [see
DS  T [see
DS  T [see
]
Timing
2
2
2
2
1
]
]
]
]
2
2
2
2
2
2
2
]
]
]
3,2
]
]
]
]
3,2
2,3
]
Electrical Characteristics
]
]
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
67

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