MCIMX6Q4AVT10ACR Freescale Semiconductor, MCIMX6Q4AVT10ACR Datasheet - Page 152
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MCIMX6Q4AVT10ACR
Manufacturer Part Number
MCIMX6Q4AVT10ACR
Description
Processors - Application Specialized i.MX6Q
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet
1.MCIMX6Q6AVT10AC.pdf
(166 pages)
Specifications of MCIMX6Q4AVT10ACR
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
256 KB
Operating Supply Voltage
1.05 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FCBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
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Package Information and Contact Assignments
152
DRAM_SDCLK_0_B AE15
DRAM_SDCLK_1_B AE14
DRAM_SDQS0_B
DRAM_SDQS1_B
DRAM_SDQS2_B
DRAM_SDQS3_B
DRAM_SDQS4_B
DRAM_SDQS5_B
DRAM_SDQS6_B
DRAM_SDQS7_B
DRAM_SDCLK_0
DRAM_SDCLK_1
DRAM_SDCKE0
DRAM_SDCKE1
DRAM_SDODT0
DRAM_SDODT1
DRAM_RESET
DRAM_SDBA0
DRAM_SDBA1
DRAM_SDBA2
DRAM_SDQS0
DRAM_SDQS1
DRAM_SDQS2
DRAM_SDQS3
DRAM_SDQS4
DRAM_SDQS5
DRAM_SDQS6
DRAM_SDQS7
DRAM_DQM4
DRAM_DQM5
DRAM_DQM6
DRAM_DQM7
DRAM_SDWE
DRAM_VREF
DRAM_RAS
Ball Name
i.MX 6Dual/6Quad Automotive and Infotainment Applications Processors, Rev. 2
AB18
AC20
AD24
AB15
AC15
AB12
AA11
AD15
AD14
AC16
AB17
AC10
AB10
AD18
AE18
AD20
AE20
AD23
AE23
AA25
AA24
AB16
Table 101. 21 x 21 mm Functional Contact Assignments (continued)
AD3
AD6
AD8
Ball
Y21
Y15
Y11
AE3
AE6
AE8
AC2
Y6
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
NVCC_DRAM
Power Group
DRAM_VREF
Ball Type
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
DDRCLK
ANALOG
LPDDR2
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
Default
(Reset
Mode)
Mode
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
—
—
—
—
—
—
—
—
—
—
—
DRAM_SDCLK0_N
DRAM_SDCLK1_N
DRAM_SDCLK0_P
DRAM_SDCLK1_P
DRAM_SDQS0_P
DRAM_SDQS0_N
DRAM_SDQS1_P
DRAM_SDQS1_N
DRAM_SDQS2_P
DRAM_SDQS2_N
DRAM_SDQS3_P
DRAM_SDQS3_N
DRAM_SDQS4_P
DRAM_SDQS4_N
DRAM_SDQS5_P
DRAM_SDQS5_N
DRAM_SDQS6_P
DRAM_SDQS6_N
DRAM_SDQS7_P
DRAM_SDQS7_N
Default Function
DRAM_SDWE_B
DRAM_SDCKE0
DRAM_SDCKE1
DRAM_RAS_B
DRAM_RESET
(Signal Name)
DRAM_SDBA0
DRAM_SDBA1
DRAM_SDBA2
DRAM_DQM4
DRAM_DQM5
DRAM_DQM6
DRAM_DQM7
DRAM_ODT0
DRAM_ODT1
DRAM_VREF
Out of Reset Condition
Input/Output
Freescale Semiconductor
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
1
—
—
—
—
—
—
—
—
—
—
—
Value
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
—
—
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
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