MC68HC908GR8CD Freescale Semiconductor, MC68HC908GR8CD Datasheet - Page 122

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MC68HC908GR8CD

Manufacturer Part Number
MC68HC908GR8CD
Description
8-bit Microcontrollers - MCU 8 Bit 8MHz
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC908GR8CD

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
HC08
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
64 KB
Data Ram Size
384 B
Operating Supply Voltage
3 V to 5 V
Package / Case
SOIC-28
Mounting Style
SMD/SMT
Data Rom Size
64 KB
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
21
Program Memory Type
Flash
Keyboard Interrupt (KBI)
A keyboard interrupt is latched when one or more keyboard pins goes low after all were high. The MODEK
bit in the keyboard status and control register controls the triggering mode of the keyboard interrupt.
If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low-level sensitive, and both
of the following actions must occur to clear a keyboard interrupt request:
The vector fetch or software clear and the return of all enabled keyboard interrupt pins to a high level may
occur in any order.
If the MODEK bit is clear, the keyboard interrupt pin is falling-edge-sensitive only. With MODEK clear, a
vector fetch or software clear immediately clears the keyboard interrupt request.
Reset clears the keyboard interrupt request and the MODEK bit, clearing the interrupt request even if a
keyboard interrupt pin stays low.
The keyboard flag bit (KEYF) in the keyboard status and control register can be used to see if a pending
interrupt exists. The KEYF bit is not affected by the keyboard interrupt mask bit (IMASKK) which makes
it useful in applications where polling is preferred.
122
Addr.
$001A
$001B
If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard pin does not latch an
interrupt request if another keyboard pin is already low. To prevent losing an interrupt request on
one pin because another pin is still low, software can disable the latter pin while it is low.
If the keyboard interrupt is falling-edge and low-level sensitive, an interrupt request is present as
long as any keyboard interrupt pin is low and the pin is keyboard interrupt enabled.
Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a 1 to the
ACKK bit in the keyboard status and control register (INTKBSCR). The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine can also
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the vector address at locations $FFE0 and $FFE1.
Return of all enabled keyboard interrupt pins to a high level — As long as any enabled keyboard
interrupt pin is low, the keyboard interrupt remains set.
Keyboard Interrupt Enable
Register Name
Register (INTKBIER)
and Control Register
Keyboard Status
(INTKBSCR)
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Figure 13-2. I/O Register Summary
Bit 7
0
0
0
= Unimplemented
6
0
0
0
5
0
0
0
4
0
0
0
KBIE3
KEYF
3
0
0
ACKK
KBIE2
2
0
0
0
Freescale Semiconductor
IMASKK
KBIE1
1
0
0
MODEK
KBIE0
Bit 0
0
0

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