MC68HC908GR8CD Freescale Semiconductor, MC68HC908GR8CD Datasheet - Page 131

• Manufacturer Part Number: MC68HC908GR8CD
• Description: 8-bit Microcontrollers - MCU 8 Bit 8MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908GR8CD

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: HC08
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 384 B
• Operating Supply Voltage: 3 V to 5 V
• Package / Case: SOIC-28
• Mounting Style: SMD/SMT
• Data Rom Size: 64 KB
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 21
• Program Memory Type: Flash

Chapter 15
Monitor ROM (MON)
15.1 Introduction
This section describes the monitor ROM (MON) and the monitor mode entry methods. The monitor ROM
allows complete testing of the MCU through a single-wire interface with a host computer. Monitor mode
entry can be achieved without use of the higher test voltage, V
and $FFFF are blank, thus reducing the hardware requirements for in-circuit programming.
15.2 Features
Features of the monitor ROM include:
15.3 Functional Description
The monitor ROM receives and executes commands from a host computer.
example circuit used to enter monitor mode and communicate with a host computer via a standard
RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
Freescale Semiconductor
unauthorized users.
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Normal user-mode pin functionality
One pin dedicated to serial communication between monitor ROM and host computer
Standard mark/space non-return-to-zero (NRZ) communication with host computer
Execution of code in RAM or FLASH
FLASH memory security feature
FLASH memory programming interface
Enhanced PLL (phase-locked loop) option to allow use of external 32.768-kHz crystal to generate
internal frequency of 2.4576 MHz
310 byte monitor ROM code size ($FE20 to $FF55)
Monitor mode entry without high voltage, V
$FF)
Standard monitor mode entry if high voltage, V
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
(1)
TST
, if reset vector is blank ($FFFE and $FFFF contain
TST
, is applied to IRQ
TST
, as long as vector addresses $FFFE
Figure 15-1
shows an
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