MC68HC908GR8CD Freescale Semiconductor, MC68HC908GR8CD Datasheet - Page 79

• Manufacturer Part Number: MC68HC908GR8CD
• Description: 8-bit Microcontrollers - MCU 8 Bit 8MHz
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC908GR8CD

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: HC08
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 8 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 384 B
• Operating Supply Voltage: 3 V to 5 V
• Package / Case: SOIC-28
• Mounting Style: SMD/SMT
• Data Rom Size: 64 KB
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 21
• Program Memory Type: Flash

7.5 CGMC Registers
These registers control and monitor operation of the CGMC:
Figure 7-3
Freescale Semiconductor
NOTES:
Addr.
$003A
$003B
$0036
$0037
$0038
$0039
1. When AUTO = 0, PLLIE is forced clear and is read-only.
2. When AUTO = 0, PLLF and LOCK read as clear.
3. When AUTO = 1, ACQ is read-only.
4. When PLLON = 0 or VRS7:VRS0 = $0, BCS is forced clear and is read-only.
5. When PLLON = 1, the PLL programming register is read-only.
6. When BCS = 1, PLLON is forced set and is read-only.
•
•
•
•
•
•
PLL control register (PCTL)
(See
PLL bandwidth control register (PBWC)
(See
PLL multiplier select register high (PMSH)
(See
PLL multiplier select register low (PMSL)
(See
PLL VCO range select register (PMRS)
(See
PLL reference divider select register (PMDS)
(See
PLL Multiplier Select High
PLL Multiplier Select Low
Register Name
Select Register (PMDS)
PLL VCO Select Range
is a summary of the CGMC registers.
PLL Bandwidth Control
PLL Reference Divider
7.5.1 PLL Control
7.5.2 PLL Bandwidth Control
7.5.3 PLL Multiplier Select Register
7.5.4 PLL Multiplier Select Register
7.5.5 PLL VCO Range Select
7.5.6 PLL Reference Divider Select
PLL Control Register
Register (PBWC)
Register (PMSH)
Register (PMRS)
Register (PMSL)
(PCTL)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
Figure 7-3. CGMC I/O Register Summary
Register.)
PLLIE
AUTO
Bit 7
MUL7
VRS7
0
0
0
0
0
0
0
0
Register.)
= Unimplemented
Register.)
LOCK
MUL6
VRS6
PLLF
6
0
0
0
0
1
1
0
0
High.)
Low.)
Register.)
PLLON
MUL5
VRS5
ACQ
5
1
0
0
0
0
0
0
0
MUL4
VRS4
BCS
4
R
0
0
0
0
0
0
0
0
0
= Reserved
MUL11
MUL3
RDS3
PRE1
VRS3
3
0
0
0
0
0
0
0
MUL10
MUL2
RDS2
PRE0
VRS2
2
0
0
0
0
0
0
0
VPR1
MUL9
MUL1
VRS1
RDS1
CGMC Registers
1
0
0
0
0
0
0
0
Bit 0
VPR0
MUL8
MUL0
VRS0
RDS0
R
0
0
0
0
0
1
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