MC68HC908GR8CD Freescale Semiconductor, MC68HC908GR8CD Datasheet - Page 59

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MC68HC908GR8CD

Manufacturer Part Number
MC68HC908GR8CD
Description
8-bit Microcontrollers - MCU 8 Bit 8MHz
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC908GR8CD

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
HC08
Data Bus Width
8 bit
Maximum Clock Frequency
8 MHz
Program Memory Size
64 KB
Data Ram Size
384 B
Operating Supply Voltage
3 V to 5 V
Package / Case
SOIC-28
Mounting Style
SMD/SMT
Data Rom Size
64 KB
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
21
Program Memory Type
Flash
AIEN — ADC Interrupt Enable Bit
ADCO — ADC Continuous Conversion Bit
ADCH4–ADCH0 — ADC Channel Select Bits
The voltage levels supplied from internal reference nodes, as specified in
operation of the ADC converter both in production test and for user applications.
Freescale Semiconductor
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
When this bit is set, the ADC will convert samples continuously and update the ADR register at the end
of each conversion. Only one conversion is allowed when this bit is cleared. Reset clears the ADCO bit.
ADCH4–ADCH0 form a 5-bit field which is used to select one of 16 ADC channels. Only six channels,
AD5–AD0, are available on this MCU. The channels are detailed in
when using a port pin as both an analog and digital input simultaneously to prevent switching noise
from corrupting the analog signal. See
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not being used.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
1 = Continuous ADC conversion
0 = One ADC conversion
Recovery from the disabled state requires one conversion cycle to stabilize.
NOTE: If an unknown channel is selected it should be made clear what value the user will read
from the ADC Data Register, unknown or reserved is not specific enough.
ADCH4
0
0
0
0
0
0
0
0
1
1
1
1
1
MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7
ADCH3
0
0
0
0
0
0
0
0
1
1
1
1
1
Table 5-1. Mux Channel Select
ADCH2
Table
0
0
0
0
1
1
1
1
0
1
1
1
1
5-1.
NOTE
ADCH1
0
0
1
1
0
0
1
1
1
0
0
1
1
ADCH0
0
1
0
1
0
1
0
1
1
0
1
0
1
Table
Table
5-1. Care should be taken
ADC power off
Input Select
5-1, are used to verify the
PTB0/ATD0
PTB1/ATD1
PTB2/ATD2
PTB3/ATD3
PTB4/ATD4
PTB5/ATD5
Reserved
Reserved
Reserved
Reserved
Reserved
V
V
REFH
REFL
I/O Registers
59

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