MA330028 Microchip Technology, MA330028 Datasheet - Page 336

• Manufacturer Part Number: MA330028
• Description: Daughter Cards & OEM Boards dsPIC33EP64MC504 PIM
• Manufacturer: Microchip Technology

Specifications of MA330028

• Rohs: yes
• Product: Daughter Cards
• Core: dsPIC
• Description/function: Plug-in-module with dsPIC33EP64MC504 device for use with DM330021 and DM330023 motor control development board
• Interface Type: CAN, I2C, SPI
• Operating Supply Voltage: 3 to 3.6 V
• Tool Is For Evaluation Of: dsPIC33EP64MC504
• For Use With: DM330021, DM330023

24.3
REGISTER 24-1:
DS70657E-page 336
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5-2
Note 1:
PTGSTRT
PTGEN
R/W-0
R/W-0
2:
PTG Control Registers
These bit apply to the PTGWHI and PTGWLO commands only.
This bit is only used with the PTGCTRL step command software trigger option.
PTGEN: Module Enable bit
1 = PTG module is enabled
0 = PTG module is disabled
Unimplemented: Read as ‘0’
PTGSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
PTGTOGL: TRIG Output Toggle Mode bit
1 = Toggle state of the PTGOx for each execution of the PTGTRIG command
0 = Each execution of PTGTRIG command will generate a single PTGOx pulse determined by value
Unimplemented: Read as ‘0’
PTGSWT: Software Trigger bit
1 = Trigger the PTG module
0 = No action (clearing this bit will have no effect)
PTGSSEN: Enable Single Step
1 = Enable Single Step mode
0 = Disable Single Step mode
PTGIVIS: Counter/Timer Visibility Control bit
1 = Reads of the PTGSDLIM, PTGCxLIM or PTGTxLIM registers returns the current values of their
0 = Reads of the PTGSDLIM, PTGCxLIM or PTGTxLIM registers returns the value previously written
PTGSTRT: Start PTG Sequencer bit
1 = Start to sequentially execute commands (Continuous mode)
0 = Stop executing commands
PTGWDTO: PTG Watchdog Timer Time-out Status bit
1 = PTG watchdog timer has timed out
0 = PTG watchdog timer has not timed out.
Unimplemented: Read as ‘0’
PTGWDTO
in PTGPWD
corresponding counter/timer registers (PTGSD, PTGCx, PTGTx)
to those limit registers
HS-0
U-0
—
PTGCST: PTG CONTROL/STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
PTGSIDL
R/W-0
U-0
—
PTGTOGL
(2)
R/W-0
U-0
Preliminary
—
HS = Set by Hardware
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
PTGSWT
R/W-0
U-0
—
© 2011-2012 Microchip Technology Inc.
(2)
x = Bit is unknown
PTGSSEN
R/W-0
PTGITM<1:0>
R/W-0
PTGIVIS
R/W-0
(1)
bit 8
bit 0