MT9HVF3272KY-667B1 Micron Technology Inc, MT9HVF3272KY-667B1 Datasheet
MT9HVF3272KY-667B1
Specifications of MT9HVF3272KY-667B1
Related parts for MT9HVF3272KY-667B1
MT9HVF3272KY-667B1 Summary of contents
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... Serial presence detect (SPD) with EEPROM • Gold edge contacts • Single rank PDF: 09005aef81c9620b/Source: 09005aef81c961ec HVF9C32_64_128x72K_1.fm - Rev. B 11/05 EN Products and specifications discussed herein are subject to change by Micron without notice. www.micron.com/products/modules Figure 1: 244-Pin VLP MiniDIMM Height 0.717in (18.2mm) Options • Register parity • ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 1: Address Table Refresh count Row addressing Device bank addressing Device page size per bank Device configuration Column addressing Module rank addressing Table 2: Key Timing Parameters Speed Grade ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table of Contents Features . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM List of Figures Figure 1: 244-Pin VLP MiniDIMM . . . . . . . . . . . . . . . . . . . . . . ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM List of Tables Table 1: Address Table . . . . . . . . . . . . . . . . . . . . . . . ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Pin Assignments and Descriptions Table 4: Pin Assignments 244-Pin MiniDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol REF DQ24 ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 5: Pin Descriptions Pin numbers may not correlate with symbols; refer to Pin Assignment tables on page 6 for more information Pin Numbers 198 188, 189 CK0, CK0# 53 ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 5: Pin Descriptions Pin numbers may not correlate with symbols; refer to Pin Assignment tables on page 6 for more information Pin Numbers 10, 12, 13, ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 5: Pin Descriptions Pin numbers may not correlate with symbols; refer to Pin Assignment tables on page 6 for more information Pin Numbers 11, 14, 17, ...
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... SR) 244-Pin DDR2 VLP Reg. MiniDIMM Functional Block Diagram Unless otherwise noted, resistor values are 22Ω. Micron module part numbers are explained in the Module Part Numbering Guide at www.micron.com/numberguide. Modules use the following DDR2 SDRAM devices: MT47H32M8BP (256MB); MT47H64M8BT (512MB); and MT47H128M8BT (1GB). Figure 3: Functional Block Diagram ...
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... READ or WRITE command are used to select the device bank and the starting column location for the burst access. DDR2 SDRAM modules provide for programmable read or write burst lengths of four or eight locations. DDR2 SDRAM devices support interrupting a burst read of eight with another read burst write of eight with another write ...
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... SR) 244-Pin DDR2 VLP Reg. MiniDIMM Serial Presence-Detect Operation DDR2 SDRAM modules incorporate serial presence-detect (SPD). The SPD function is implemented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes can be programmed by Micron to identify the module type and various SDRAM organizations and timing parameters ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Figure 4: DDR2 Power-Up and Initialization DDL VTD REF T0 Ta0 ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Mode Register (MR) The mode register is used to define the specific mode of operation of the DDR2 SDRAM device. This definition includes the selection of a burst length (BL), ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Figure 5: Mode Register (MR) Definition 256MB Address Bus 512MB Address Bus BA1 15 MR 1GB Address Bus BA2 BA1 M15 PDF: 09005aef81c9620b/Source: ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 6: Burst Definition BursT Length Operating Mode The normal operating mode is selected by issuing a LOAD MODE command with bit M7 set to zero, and all other bits ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Power-Down Mode Active power-down (PD) mode is defined by bit M12 as shown in Figure 5 on page 15. PD mode allows the user to determine the active power-down mode, ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Figure 6: CAS Latency T0 T1 CK# CK READ NOP COMMAND DQS, DQS CK# CK READ NOP COMMAND DQS, DQS# DQ Notes ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Extended Mode Register (EMR) The extended mode register controls functions beyond those controlled by the mode register; these additional functions are DLL enable/disable, output drive strength, ODT (R ), posted ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Figure 7: Extended Mode Register Definition 256MB Address Bus 512MB Address Bus BA1 15 EMR 1GB Address Bus BA2 BA1 MRS E15 E14 ...
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... DDR2 SDRAM device controller to independently turn on/off ODT for any or all devices. R apply to each DQ, DQS/DQS#, RDQS/RDQS#, and DM signals. Additionally, the -667 speed modules offer a third option of 50Ω. Reserved states should not be used, as unknown operation or incompatibility with future versions may result. The ODT control pin is used to determine when R ODT has been enabled via bits E2 and E6 of the EMR ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Off-Chip Driver (OCD) Impedance Calibration The OCD function is not supported and must be set to the default state. See “Initializa- tion” on page 12, to properly set OCD defaults. ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Extended Mode Register 2 (EMR2) The extended mode register 2 (EMR2) controls functions beyond those controlled by the mode register. Currently all bits in EMR2 are reserved as shown in ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Extended Mode Register 3 (EMR3) The extended mode register 3 (EMR3) controls functions beyond those controlled by the mode register. Currently all bits in EMR3 are reserved as shown in ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Command Truth Tables Table 7 provides a quick reference of DDR2 SDRAM device available commands. Refer to the 256Mb, 512Mb, or 1Gb DDR2 SDRAM component data sheet for more Truth ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Electrical Specifications Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 10: Input DC Logic Levels All voltages referenced to V Parameter Input high (Logic 1) voltage Input low (Logic 0) voltage Table 11: Input AC Logic Levels All voltages ...
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... Simulations can then render a con- siderably more accurate result. JEDEC modules are now designed by using simulations to close timing budgets. PDF: 09005aef81c9620b/Source: 09005aef81c961ec HVF9C32_64_128x72K_2 ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 15: I Specifications and Conditions – 256MB DD Values shown for DDR2 SDRAM components only Parameter/Condition Operating one bank active-precharge current RAS = RAS MIN ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 16: I Specifications and Conditions – 512MB DD Values shown for DDR2 SDRAM components only Parameter/Condition Operating one bank active-precharge current RAS = RAS MIN ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 17: I Specifications and Conditions – 1GB DD Values shown for DDR2 SDRAM components only Parameter/Condition Operating one bank active-precharge current RAS = RAS MIN ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM AC Operating Specifications Table 18: AC Operating Conditions (Sheet Notes: 1–5; notes appear on page 36; 0°C ≤ Characteristics Parameter Clock cycle ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 18: AC Operating Conditions (Sheet Notes: 1–5; notes appear on page 36; 0°C ≤ Characteristics Parameter DQS input high pulse width DQS input low ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 18: AC Operating Conditions (Sheet Notes: 1–5; notes appear on page 36; 0°C ≤ Characteristics Parameter Address and control input pulse width for each ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 18: AC Operating Conditions (Sheet Notes: 1–5; notes appear on page 36; 0°C ≤ Characteristics Parameter ODT turn-on delay ODT turn-on ODT turn-off delay ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Notes 1. All voltages referenced Tests for AC timing, nominal reference/supply voltage levels, but the related specifications and device operation are guaranteed for the full voltage range ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM 12. This is not a device limit. The device will operate with a negative value, but system performance could be degraded due to bus turnaround. 13 recommended that ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM t 29. DELAY is calculated from prior to CK, CK# being removed in a system RESET condition. t 30. ISXR is equal to 31. No more than 4 bank ACTIVE ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM PLL and Register Specifications Table 19: Register Timing Requirements and Switching Characteristics Symbol Parameter All inputs I I Static standby DD Static operating I Dynamic ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 21: PLL Clock Driver Electrical Characteristics Symbol Parameter V All inputs IK V High output voltage OH V Low output voltage OL I Output disabled low current ODL V ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 22: PLL Clock Driver Timing Requirements and Switching Characteristics Note: 1 Parameter Output Enable to any Y/Y# Output Enable to any Y/Y# Cycle to Cycle Jitter Static Phase Offset ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Serial Presence-Detect SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Figure 13: Definition of Start and Stop SCL SDA Figure 14: Acknowledge Response From Receiver SCL from Master Data Output from Transmitter Data Output from Receiver PDF: 09005aef81c9620b/Source: 09005aef81c961ec HVF9C32_64_128x72K_2.fm ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 23: EEPROM Device Select Code The most significant bit (b7) is sent first Select Code Memory area select code (two arrays) Protection register select code Table 24: EEPROM Operating ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 25: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 27: Serial Presence-Detect Matrix “1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; table notes located on page 47 Byte Description 0 Number of SPD bytes used by Micron 1 ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Table 27: Serial Presence-Detect Matrix “1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; table notes located on page 47 Byte Description 32 Address and command setup time, 33 Address and ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Package Dimensions All dimensions are in inches (millimeters); The dimensional diagram is for reference only. Refer to the MO document for complete design dimensions. Figure 16: 244-Pin VLP Registered MiniDIMM ...
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SR) 244-Pin DDR2 VLP Reg. MiniDIMM Data Sheet Designation Advance: This data sheet contains initial descriptions of products still under develop- ment. Advance applies to MT9HVF12872(P)K only. Released (No Mark): This data sheet contains minimum and ...