MT9HVF3272KY-667B1 Micron Technology Inc, MT9HVF3272KY-667B1 Datasheet - Page 25

• Manufacturer Part Number: MT9HVF3272KY-667B1
• Description: MODULE DDR2 256MB 244MDIMM VLP
• Manufacturer: Micron Technology Inc

Specifications of MT9HVF3272KY-667B1

• Memory Type: DDR2 SDRAM
• Memory Size: 256MB
• Speed: 667MT/s
• Package / Case: 244-MDIMM
• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 244VLP MiniRDIMM
• Device Core Size: 72b
• Organization: 32Mx72
• Total Density: 256MByte
• Chip Density: 256Mb
• Access Time (max): 450ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 1.71A
• Number Of Elements: 9
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 55C
• Operating Temperature Classification: Commercial
• Pin Count: 244
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Command Truth Tables
Table 7:
PDF: 09005aef81c9620b/Source: 09005aef81c961ec
HVF9C32_64_128x72K_2.fm - Rev. B 11/05 EN
Function
Mode Register Set
Refresh
Self Refresh Entry
Self Refresh Exit
Single Device Bank
Precharge
ALL Device Banks
Precharge
Device Bank Activate
Write
Write with Auto
Precharge
Read
Read with Auto
Precharge
No Operation
Device Deselect
Power-Down Entry
Power-Down Exit
Commands Truth Table
Notes: 1, 5, 6
Notes: 1. All DDR2 SDRAM device commands are defined by states of S#, RAS#, CAS#, WE#, and CKE
Previous
Table 7 provides a quick reference of DDR2 SDRAM device available commands. Refer
to the 256Mb, 512Mb, or 1Gb DDR2 SDRAM component data sheet for more Truth Table
definitions, including CKE power-down modes and device bank-to-bank commands.
Cycle
2. Device Bank addresses (BA) BA0–BA1/BA2 determine which device bank is to be operated
3. Burst reads or writes at BL = 4 cannot be terminated or interrupted. Refer to the 256Mb,
4. The Power Down Mode does not perform any refresh operations. The duration of power-
5. The state of ODT does not affect the states described in this table. The ODT function is not
6. “X” means “H or L” (but a defined logic level).
7. Self refresh exit is asynchronous.
8. BA2 valid for 1GB only; A13 valid for 512MB and 1GB only.
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
at the rising edge of the clock.
upon. For EMR, BA selects an extended mode register.
512Mb, or 1Gb DDR2 SDRAM discrete data sheet for other restrictions or details.
down is therefore limited by the refresh requirements outlined in the AC parametric sec-
tion.
available during self refresh. Refer to the 256Mb, 512Mb, or 1Gb DDR2 SDRAM discrete
data sheet for other restrictions or details.
256MB, 512MB, 1GB: (x72, SR) 244-Pin DDR2 VLP Reg. MiniDIMM
CKE
Current
Cycle
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
S#
H
H
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS# CAS# WE#
H
H
H
H
H
H
H
H
X
X
X
X
L
L
L
L
L
L
25
X
H
H
H
H
H
X
X
H
X
H
L
L
L
L
L
L
L
Micron Technology, Inc., reserves the right to change products or specifications without notice.
H
H
X
H
H
H
H
H
X
X
H
X
H
L
L
L
L
L
BA2
BA1,
BA0
BA
BA
BA
BA
BA
BA
BA
X
X
X
X
X
X
X
X
X
X
X
8
,
Column
Address
Column
Address
Column
Address
Column
Address
A13
A11
Command Truth Tables
X
X
X
X
X
X
X
X
X
X
X
X
©2004, 2005 Micron Technology, Inc. All rights reserved.
8
–
Row Address
OP Code
A10
X
X
X
X
H
H
H
X
X
X
X
X
X
L
L
L
Address
Address
Address
Address
Column
Column
Column
Column
A9–A0 Notes
X
X
X
X
X
X
X
X
X
X
X
X
2, 3
2, 3
2, 3
2, 3
2
2
2
4
4
7